5 #include <device/pci_def.h>
7 #include <device/pnp_def.h>
8 #include <arch/romcc_io.h>
11 #include "pc80/serial.c"
12 #include "arch/i386/lib/console.c"
13 #include "lib/ramtest.c"
14 #include "northbridge/via/vt8601/raminit.h"
15 #include "cpu/x86/mtrr/earlymtrr.c"
16 #include "cpu/x86/bist.h"
17 #include "pc80/udelay_io.c"
18 #include "lib/delay.c"
19 #include "cpu/x86/lapic/boot_cpu.c"
20 #include "lib/debug.c"
21 #include "southbridge/via/vt8231/vt8231_early_smbus.c"
22 #include "southbridge/via/vt8231/vt8231_early_serial.c"
24 static inline int spd_read_byte(unsigned device, unsigned address)
26 return smbus_read_byte(device, address);
29 #include "northbridge/via/vt8601/raminit.c"
31 #include "lib/generic_sdram.c"
34 static void enable_mainboard_devices(void)
37 /* dev 0 for southbridge */
39 dev = pci_locate_device(PCI_ID(0x1106,0x8231), 0);
41 if (dev == PCI_DEV_INVALID) {
42 die("Southbridge not found!!!\n");
45 pci_write_config8(dev, 0x50, 7);
46 pci_write_config8(dev, 0x51, 0xff);
48 // This early setup switches IDE into compatibility mode before PCI gets
49 // a chance to assign I/Os
50 // movl $CONFIG_ADDR(0, 0x89, 0x42), %eax
53 // PCI_WRITE_CONFIG_BYTE
56 /* we do this here as in V2, we can not yet do raw operations
59 /* changed this to work correctly on later revisions of LB.
60 * The original dev += 0x100; stopped working. It also appears
61 * that if this is not set here, but in ide_init() only, the IDE
62 * does not work at all. I assume it needs to be set before something else,
63 * possibly before enabling the IDE peripheral, or it is a timing issue.
64 * Ben Hewson 29 Apr 2007.
67 dev = pci_locate_device(PCI_ID(0x1106,0x0571), 0);
68 pci_write_config8(dev, 0x42, 0);
71 static void enable_shadow_ram(void)
74 unsigned char shadowreg;
76 shadowreg = pci_read_config8(dev, 0x63);
79 pci_write_config8(dev, 0x63, shadowreg);
82 static void main(unsigned long bist)
89 enable_vt8231_serial();
93 /* Halt if there was a built in self test failure */
94 report_bist_failure(bist);
96 enable_mainboard_devices();
101 this is way more generic than we need.
102 sdram_initialize(ARRAY_SIZE(cpu), cpu);
104 sdram_set_registers((const struct mem_controller *) 0);
105 sdram_set_spd_registers((const struct mem_controller *) 0);
106 sdram_enable(0, (const struct mem_controller *) 0);
108 /* Check all of memory */
110 ram_check(0x00000000, msr.lo);
113 static const struct {
114 unsigned long lo, hi;
116 /* Check 16MB of memory @ 0*/
117 { 0x00000000, 0x01000000 },
119 /* Check 16MB of memory @ 2GB */
120 { 0x80000000, 0x81000000 },
124 for(i = 0; i < ARRAY_SIZE(check_addrs); i++) {
125 ram_check(check_addrs[i].lo, check_addrs[i].hi);