Changes to allow Via/Epia code to be compiled after recent code changes.
[coreboot.git] / src / mainboard / via / epia / failover.c
1 #define ASSEMBLY 1
2 #include <stdint.h>
3 #include <device/pci_def.h>
4 #include <device/pci_ids.h>
5 #include <arch/io.h>
6 #include "arch/romcc_io.h"
7 #include "pc80/mc146818rtc_early.c"
8 #include "cpu/x86/lapic/boot_cpu.c"
9
10 static void main(void)
11 {
12   /* for now, just always assume failure */
13
14 #if 0
15         /* Is this a cpu reset? */
16         if (cpu_init_detected()) {
17                 if (last_boot_normal()) {
18                         asm("jmp __normal_image");
19                 } else {
20                         asm("jmp __cpu_reset");
21                 }
22         }
23
24         /* This is the primary cpu how should I boot? */
25         else if (do_normal_boot()) {
26                 asm("jmp __normal_image");
27         }
28 #endif
29 }