src/mainboard/via/epia/Config.lb

   1 include /config/nofailovercalculation.lb
   2
   3 ##
   4 ## Set all of the defaults for an x86 architecture
   5 ##
   6
   7 arch i386 end
   8
   9 ##
  10 ## Build the objects we have code for in this directory.
  11 ##
  12
  13 driver mainboard.o
  14 if HAVE_PIRQ_TABLE object irq_tables.o end
  15 #object reset.o
  16
  17 ##
  18 ## Romcc output
  19 ##
  20 makerule ./failover.E
  21         depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
  22         action "../romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
  23 end
  24
  25 makerule ./failover.inc
  26         depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
  27         action "../romcc    -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
  28 end
  29
  30 makerule ./auto.E
  31         depends "$(MAINBOARD)/auto.c option_table.h ../romcc"
  32         action  "../romcc -E -mcpu=c3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
  33 end
  34 makerule ./auto.inc
  35         depends "$(MAINBOARD)/auto.c option_table.h ../romcc"
  36         action  "../romcc    -mcpu=c3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
  37 end
  38
  39 ##
  40 ## Build our 16 bit and 32 bit coreboot entry code
  41 ##
  42 mainboardinit cpu/x86/16bit/entry16.inc
  43 mainboardinit cpu/x86/32bit/entry32.inc
  44 ldscript /cpu/x86/16bit/entry16.lds
  45 ldscript /cpu/x86/32bit/entry32.lds
  46
  47 ##
  48 ## Build our reset vector (This is where coreboot is entered)
  49 ##
  50 if USE_FALLBACK_IMAGE
  51         mainboardinit cpu/x86/16bit/reset16.inc
  52         ldscript /cpu/x86/16bit/reset16.lds
  53 else
  54         mainboardinit cpu/x86/32bit/reset32.inc
  55         ldscript /cpu/x86/32bit/reset32.lds
  56 end
  57
  58 ### Should this be in the northbridge code?
  59 mainboardinit arch/i386/lib/cpu_reset.inc
  60
  61 ##
  62 ## Include an id string (For safe flashing)
  63 ##
  64 mainboardinit arch/i386/lib/id.inc
  65 ldscript /arch/i386/lib/id.lds
  66
  67 ###
  68 ### This is the early phase of coreboot startup
  69 ### Things are delicate and we test to see if we should
  70 ### failover to another image.
  71 ###
  72 if USE_FALLBACK_IMAGE
  73         ldscript /arch/i386/lib/failover.lds
  74         mainboardinit ./failover.inc
  75 end
  76
  77 ###
  78 ### O.k. We aren't just an intermediary anymore!
  79 ###
  80
  81 ##
  82 ## Setup RAM
  83 ##
  84 mainboardinit cpu/x86/fpu/enable_fpu.inc
  85 mainboardinit cpu/x86/mmx/enable_mmx.inc
  86 mainboardinit ./auto.inc
  87 mainboardinit cpu/x86/mmx/disable_mmx.inc
  88
  89 ##
  90 ## Include the secondary Configuration files
  91 ##
  92 dir /pc80
  93 config chip.h
  94
  95 chip northbridge/via/vt8601
  96         device pci_domain 0 on
  97                 device pci 0.0 on end                   # Northbridge
  98 #               device pci 0.1 on                       # AGP bridge
  99                 #       chip drivers/pci/onboard        # Integrated VGA
 100                 #               device pci 0.0 on end
 101                 #               register "rom_adress" = "0xfff80000"
 102                 #       end
 103 #               end
 104                 chip southbridge/via/vt8231
 105                         register "enable_native_ide" = "0"
 106                         register "enable_com_ports" = "1"
 107                         register "enable_keyboard" = "0"
 108                         device pci 11.0 on              # Southbrdge
 109                                 chip superio/winbond/w83627hf
 110                                         device pnp 2e.0 on      #  Floppy
 111                                            io 0x60 = 0x3f0
 112                                           irq 0x70 = 6
 113                                           drq 0x74 = 2
 114                                         end
 115                                         device pnp 2e.1 off     #  Parallel Port
 116                                            io 0x60 = 0x378
 117                                           irq 0x70 = 7
 118                                         end
 119                                         device pnp 2e.2 on      #  Com1
 120                                            io 0x60 = 0x3f8
 121                                           irq 0x70 = 4
 122                                         end
 123                                         device pnp 2e.3 off     #  Com2
 124                                            io 0x60 = 0x2f8
 125                                           irq 0x70 = 3
 126                                         end
 127                                         device pnp 2e.5 on      #  Keyboard
 128                                            io 0x60 = 0x60
 129                                            io 0x62 = 0x64
 130                                           irq 0x70 = 1
 131                                           irq 0x72 = 12
 132                                         end
 133                                 register "com1" = "{TTYS0_BAUD}"
 134                                 end
 135                                 device pnp 2e.6 off end         #  CIR
 136                                 device pnp 2e.7 off end         #  GAME_MIDI_GIPO1
 137                                 device pnp 2e.8 off end         #  GPIO2
 138                                 device pnp 2e.9 off end         #  GPIO3
 139                                 device pnp 2e.a off end         #  ACPI
 140                                 device pnp 2e.b on              #  HW Monitor
 141                                         io 0x60 = 0x290
 142                                 end
 143                         end
 144                         device pci 11.1 on  end         # Ide
 145                         device pci 11.2 off end         # Usb port 0-1
 146                         device pci 11.3 off end         # Usb port 2-3
 147                         device pci 11.4 off end         # ACPI
 148                         device pci 11.5 off end         # AC97 Audio
 149                         device pci 11.6 on  end         # AC97 Modem
 150                         device pci 12.0 on  end         # Ethernet
 151                 end
 152         end
 153
 154         device apic_cluster 0 on
 155                 chip cpu/via/model_c3
 156                         device apic 0 on end
 157                 end
 158         end
 159 end