3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
9 uses CONFIG_MAX_PHYSICAL_CPUS
10 uses CONFIG_LOGICAL_CPUS
18 uses ROM_SECTION_OFFSET
19 uses CONFIG_ROM_STREAM
20 uses CONFIG_ROM_STREAM_START
28 uses LB_CKS_RANGE_START
32 uses MAINBOARD_PART_NUMBER
34 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
35 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
36 uses LINUXBIOS_EXTRA_VERSION
41 uses DEFAULT_CONSOLE_LOGLEVEL
42 uses MAXIMUM_CONSOLE_LOGLEVEL
43 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
44 uses CONFIG_CONSOLE_SERIAL8250
53 uses CONFIG_CONSOLE_VGA
54 uses CONFIG_PCI_ROM_RUN
55 uses K8_E0_MEM_HOLE_SIZEK
67 ## ROM_SIZE is the size of boot ROM that this board will use.
69 default ROM_SIZE=524288
72 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
74 default FALLBACK_SIZE=131072
77 ## Build code for the fallback boot
79 default HAVE_FALLBACK_BOOT=1
82 ## Build code to reset the motherboard from linuxBIOS
84 default HAVE_HARD_RESET=1
87 ## Build code to export a programmable irq routing table
89 default HAVE_PIRQ_TABLE=1
90 default IRQ_SLOT_COUNT=22
93 ## Build code to export an x86 MP table
94 ## Useful for specifying IRQ routing values
96 default HAVE_MP_TABLE=1
99 ## Build code to export a CMOS option table
101 default HAVE_OPTION_TABLE=1
104 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
106 default LB_CKS_RANGE_START=49
107 default LB_CKS_RANGE_END=122
108 default LB_CKS_LOC=123
111 ## Build code for SMP support
112 ## Only worry about 2 micro processors
115 default CONFIG_MAX_CPUS=8
116 default CONFIG_MAX_PHYSICAL_CPUS=4
117 default CONFIG_LOGICAL_CPUS=1
120 default CONFIG_CHIP_NAME=1
123 default K8_E0_MEM_HOLE_SIZEK=0x100000
126 default CONFIG_CONSOLE_VGA=1
127 default CONFIG_PCI_ROM_RUN=1
131 ## enable CACHE_AS_RAM specifics
133 default USE_DCACHE_RAM=0
134 default DCACHE_RAM_BASE=0xcf000
135 default DCACHE_RAM_SIZE=0x1000
136 default CONFIG_USE_INIT=0
139 ## Build code to setup a generic IOAPIC
141 default CONFIG_IOAPIC=1
144 ## Clean up the motherboard id strings
146 default MAINBOARD_VENDOR="Tyan"
147 default MAINBOARD_PART_NUMBER="s4880"
148 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1
149 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x4880
152 ### LinuxBIOS layout values
155 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
156 default ROM_IMAGE_SIZE = 65536
159 ## Use a small 8K stack
161 default STACK_SIZE=0x2000
164 ## Use a small 16K heap
166 default HEAP_SIZE=0x4000
169 ## Only use the option table in a normal image
171 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
174 ## LinuxBIOS C code runs at this location in RAM
176 default _RAMBASE=0x00004000
179 ## Load the payload from the ROM
181 default CONFIG_ROM_STREAM = 1
184 ### Defaults of options that you may want to override in the target config file
188 ## The default compiler
190 default CC="$(CROSS_COMPILE)gcc -m32"
194 ## Disable the gdb stub by default
196 default CONFIG_GDB_STUB=0
199 ## The Serial Console
202 # To Enable the Serial Console
203 default CONFIG_CONSOLE_SERIAL8250=1
205 ## Select the serial console baud rate
206 default TTYS0_BAUD=115200
207 #default TTYS0_BAUD=57600
208 #default TTYS0_BAUD=38400
209 #default TTYS0_BAUD=19200
210 #default TTYS0_BAUD=9600
211 #default TTYS0_BAUD=4800
212 #default TTYS0_BAUD=2400
213 #default TTYS0_BAUD=1200
215 # Select the serial console base port
216 default TTYS0_BASE=0x3f8
218 # Select the serial protocol
219 # This defaults to 8 data bits, 1 stop bit, and no parity
220 default TTYS0_LCS=0x3
223 ### Select the linuxBIOS loglevel
225 ## EMERG 1 system is unusable
226 ## ALERT 2 action must be taken immediately
227 ## CRIT 3 critical conditions
228 ## ERR 4 error conditions
229 ## WARNING 5 warning conditions
230 ## NOTICE 6 normal but significant condition
231 ## INFO 7 informational
232 ## DEBUG 8 debug-level messages
233 ## SPEW 9 Way too many details
235 ## Request this level of debugging output
236 default DEFAULT_CONSOLE_LOGLEVEL=8
237 ## At a maximum only compile in this level of debugging
238 default MAXIMUM_CONSOLE_LOGLEVEL=8
241 ## Select power on after power fail setting
242 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"