2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 AMD
5 * Written by Yinghai Lu <yinghailu@amd.com> for AMD.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 /* This file was generated by getpir.c, do not modify!
23 * (but if you do, please run checkpir on it to verify)
24 * Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
26 * Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
28 #include <console/console.h>
29 #include <device/pci.h>
32 #include <arch/pirq_routing.h>
34 #include <cpu/amd/amdk8_sysconf.h>
35 #include "mb_sysconf.h"
37 static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
38 uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
39 uint8_t slot, uint8_t rfu)
42 pirq_info->devfn = devfn;
43 pirq_info->irq[0].link = link0;
44 pirq_info->irq[0].bitmap = bitmap0;
45 pirq_info->irq[1].link = link1;
46 pirq_info->irq[1].bitmap = bitmap1;
47 pirq_info->irq[2].link = link2;
48 pirq_info->irq[2].bitmap = bitmap2;
49 pirq_info->irq[3].link = link3;
50 pirq_info->irq[3].bitmap = bitmap3;
51 pirq_info->slot = slot;
57 unsigned long write_pirq_routing_table(unsigned long addr)
60 struct irq_routing_table *pirq;
61 struct irq_info *pirq_info;
64 struct mb_sysconf_t *m;
70 get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
74 /* Align the table to be 16 byte aligned. */
78 /* This table must be betweeen 0xf0000 & 0x100000 */
79 printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
81 pirq = (void *)(addr);
82 v = (uint8_t *)(addr);
84 pirq->signature = PIRQ_SIGNATURE;
85 pirq->version = PIRQ_VERSION;
87 pirq->rtr_bus = m->bus_mcp55[0];
88 pirq->rtr_devfn = ((sbdn+6)<<3)|0;
90 pirq->exclusive_irqs = 0;
92 pirq->rtr_vendor = 0x10de;
93 pirq->rtr_device = 0x0370;
95 pirq->miniport_data = 0;
97 memset(pirq->rfu, 0, sizeof(pirq->rfu));
99 pirq_info = (void *) ( &pirq->checksum + 1);
102 write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
103 pirq_info++; slot_num++;
105 for(i=1; i< sysconf.hc_possible_num; i++) {
106 if(!(sysconf.pci1234[i] & 0x1) ) continue;
107 unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
108 unsigned devn = sysconf.hcdn[i] & 0xff;
110 write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
111 pirq_info++; slot_num++;
114 pirq->size = 32 + 16 * slot_num;
116 for (i = 0; i < pirq->size; i++)
119 sum = pirq->checksum - sum;
121 if (sum != pirq->checksum) {
122 pirq->checksum = sum;
125 printk(BIOS_INFO, "done.\n");
127 return (unsigned long) pirq_info;