3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
9 uses CONFIG_MAX_PHYSICAL_CPUS
10 uses CONFIG_LOGICAL_CPUS
18 uses ROM_SECTION_OFFSET
19 uses CONFIG_ROM_STREAM
20 uses CONFIG_ROM_STREAM_START
28 uses LB_CKS_RANGE_START
32 uses MAINBOARD_PART_NUMBER
34 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
35 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
36 uses LINUXBIOS_EXTRA_VERSION
46 uses DEFAULT_CONSOLE_LOGLEVEL
47 uses MAXIMUM_CONSOLE_LOGLEVEL
48 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
49 uses CONFIG_CONSOLE_SERIAL8250
53 uses CONFIG_CONSOLE_VGA
54 uses CONFIG_PCI_ROM_RUN
55 uses HW_MEM_HOLE_SIZEK
56 uses K8_HT_FREQ_1G_SUPPORT
63 uses ENABLE_APIC_EXT_ID
67 uses HT_CHAIN_UNITID_BASE
68 uses HT_CHAIN_END_UNITID_BASE
69 uses SB_HT_CHAIN_ON_BUS0
70 uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
72 ## ROM_SIZE is the size of boot ROM that this board will use.
74 #default ROM_SIZE=524288
77 default ROM_SIZE=1048576
80 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
82 #default FALLBACK_SIZE=131072
84 default FALLBACK_SIZE=0x40000
91 ## Build code for the fallback boot
93 default HAVE_FALLBACK_BOOT=1
96 ## Build code to reset the motherboard from linuxBIOS
98 default HAVE_HARD_RESET=1
101 ## Build code to export a programmable irq routing table
103 default HAVE_PIRQ_TABLE=1
104 default IRQ_SLOT_COUNT=11
107 ## Build code to export an x86 MP table
108 ## Useful for specifying IRQ routing values
110 default HAVE_MP_TABLE=1
113 ## Build code to export a CMOS option table
115 default HAVE_OPTION_TABLE=1
118 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
120 default LB_CKS_RANGE_START=49
121 default LB_CKS_RANGE_END=122
122 default LB_CKS_LOC=123
125 ## Build code for SMP support
126 ## Only worry about 2 micro processors
129 default CONFIG_MAX_CPUS=4
130 default CONFIG_MAX_PHYSICAL_CPUS=2
131 default CONFIG_LOGICAL_CPUS=1
134 #default CONFIG_CHIP_NAME=1
137 default HW_MEM_HOLE_SIZEK=0x100000
139 #Opteron K8 1G HT Support
140 default K8_HT_FREQ_1G_SUPPORT=1
142 ##HT Unit ID offset, default is 1, the typical one
143 default HT_CHAIN_UNITID_BASE=0x0
145 ##real SB Unit ID, default is 0x20, mean dont touch it at last
146 #default HT_CHAIN_END_UNITID_BASE=0x0
148 #make the SB HT chain on bus 0, default is not (0)
149 default SB_HT_CHAIN_ON_BUS0=2
151 ##only offset for SB chain?, default is yes(1)
152 default SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
155 default CONFIG_CONSOLE_VGA=1
156 default CONFIG_PCI_ROM_RUN=1
159 ## enable CACHE_AS_RAM specifics
161 default USE_DCACHE_RAM=1
162 default DCACHE_RAM_BASE=0xcf000
163 default DCACHE_RAM_SIZE=0x1000
164 default CONFIG_USE_INIT=0
166 default ENABLE_APIC_EXT_ID=1
167 default APIC_ID_OFFSET=0x10
168 default LIFT_BSP_APIC_ID=0
172 ## Build code to setup a generic IOAPIC
174 default CONFIG_IOAPIC=1
177 ## Clean up the motherboard id strings
179 default MAINBOARD_PART_NUMBER="s2895"
180 default MAINBOARD_VENDOR="Tyan"
181 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1
182 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2895
185 ### LinuxBIOS layout values
188 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
189 default ROM_IMAGE_SIZE = 65536
192 ## Use a small 8K stack
194 default STACK_SIZE=0x2000
197 ## Use a small 16K heap
199 default HEAP_SIZE=0x4000
202 ## Only use the option table in a normal image
204 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
207 ## LinuxBIOS C code runs at this location in RAM
209 default _RAMBASE=0x00004000
212 ## Load the payload from the ROM
214 default CONFIG_ROM_STREAM = 1
217 ### Defaults of options that you may want to override in the target config file
221 ## The default compiler
223 default CC="$(CROSS_COMPILE)gcc -m32"
227 ## Disable the gdb stub by default
229 default CONFIG_GDB_STUB=0
232 ## The Serial Console
235 # To Enable the Serial Console
236 default CONFIG_CONSOLE_SERIAL8250=1
238 ## Select the serial console baud rate
239 default TTYS0_BAUD=115200
240 #default TTYS0_BAUD=57600
241 #default TTYS0_BAUD=38400
242 #default TTYS0_BAUD=19200
243 #default TTYS0_BAUD=9600
244 #default TTYS0_BAUD=4800
245 #default TTYS0_BAUD=2400
246 #default TTYS0_BAUD=1200
248 # Select the serial console base port
249 default TTYS0_BASE=0x3f8
251 # Select the serial protocol
252 # This defaults to 8 data bits, 1 stop bit, and no parity
253 default TTYS0_LCS=0x3
256 ### Select the linuxBIOS loglevel
258 ## EMERG 1 system is unusable
259 ## ALERT 2 action must be taken immediately
260 ## CRIT 3 critical conditions
261 ## ERR 4 error conditions
262 ## WARNING 5 warning conditions
263 ## NOTICE 6 normal but significant condition
264 ## INFO 7 informational
265 ## DEBUG 8 debug-level messages
266 ## SPEW 9 Way too many details
268 ## Request this level of debugging output
269 default DEFAULT_CONSOLE_LOGLEVEL=8
270 ## At a maximum only compile in this level of debugging
271 default MAXIMUM_CONSOLE_LOGLEVEL=8
274 ## Select power on after power fail setting
275 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"