3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
8 uses HARD_RESET_FUNCTION
10 uses HAVE_OPTION_TABLE
19 uses ROM_SECTION_OFFSET
20 uses CONFIG_ROM_STREAM
21 uses CONFIG_ROM_STREAM_START
29 uses LB_CKS_RANGE_START
33 uses MAINBOARD_PART_NUMBER
35 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
36 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
37 uses LINUXBIOS_EXTRA_VERSION
47 uses DEFAULT_CONSOLE_LOGLEVEL
48 uses MAXIMUM_CONSOLE_LOGLEVEL
49 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
50 uses CONFIG_CONSOLE_SERIAL8250
54 uses CONFIG_CONSOLE_VGA
55 uses CONFIG_PCI_ROM_RUN
59 ## ROM_SIZE is the size of boot ROM that this board will use.
61 default ROM_SIZE=524288
64 #default ROM_SIZE=1048576
67 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
69 default FALLBACK_SIZE=131072
76 ## Build code for the fallback boot
78 default HAVE_FALLBACK_BOOT=1
81 ## Build code to reset the motherboard from linuxBIOS
83 default HAVE_HARD_RESET=1
85 default HARD_RESET_BUS=1
86 default HARD_RESET_DEVICE=4
87 default HARD_RESET_FUNCTION=0
90 ## Build code to export a programmable irq routing table
92 default HAVE_PIRQ_TABLE=1
93 default IRQ_SLOT_COUNT=11
96 ## Build code to export an x86 MP table
97 ## Useful for specifying IRQ routing values
99 default HAVE_MP_TABLE=1
102 ## Build code to export a CMOS option table
104 default HAVE_OPTION_TABLE=1
107 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
109 default LB_CKS_RANGE_START=49
110 default LB_CKS_RANGE_END=122
111 default LB_CKS_LOC=123
114 ## Build code for SMP support
115 ## Only worry about 2 micro processors
118 default CONFIG_MAX_CPUS=2
121 #default CONFIG_CHIP_NAME=1
124 default CK804_DEVN_BASE=0
127 default CONFIG_CONSOLE_VGA=1
128 default CONFIG_PCI_ROM_RUN=1
131 ## Build code to setup a generic IOAPIC
133 default CONFIG_IOAPIC=1
136 ## Clean up the motherboard id strings
138 default MAINBOARD_PART_NUMBER="Tyan"
139 default MAINBOARD_VENDOR="s2895"
140 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1
141 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2895
144 ### LinuxBIOS layout values
147 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
148 default ROM_IMAGE_SIZE = 65536
151 ## Use a small 8K stack
153 default STACK_SIZE=0x2000
156 ## Use a small 16K heap
158 default HEAP_SIZE=0x4000
161 ## Only use the option table in a normal image
163 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
166 ## LinuxBIOS C code runs at this location in RAM
168 default _RAMBASE=0x00004000
171 ## Load the payload from the ROM
173 default CONFIG_ROM_STREAM = 1
176 ### Defaults of options that you may want to override in the target config file
180 ## The default compiler
182 default CC="$(CROSS_COMPILE)gcc -m32"
186 ## Disable the gdb stub by default
188 default CONFIG_GDB_STUB=0
191 ## The Serial Console
194 # To Enable the Serial Console
195 default CONFIG_CONSOLE_SERIAL8250=1
197 ## Select the serial console baud rate
198 default TTYS0_BAUD=115200
199 #default TTYS0_BAUD=57600
200 #default TTYS0_BAUD=38400
201 #default TTYS0_BAUD=19200
202 #default TTYS0_BAUD=9600
203 #default TTYS0_BAUD=4800
204 #default TTYS0_BAUD=2400
205 #default TTYS0_BAUD=1200
207 # Select the serial console base port
208 default TTYS0_BASE=0x3f8
210 # Select the serial protocol
211 # This defaults to 8 data bits, 1 stop bit, and no parity
212 default TTYS0_LCS=0x3
215 ### Select the linuxBIOS loglevel
217 ## EMERG 1 system is unusable
218 ## ALERT 2 action must be taken immediately
219 ## CRIT 3 critical conditions
220 ## ERR 4 error conditions
221 ## WARNING 5 warning conditions
222 ## NOTICE 6 normal but significant condition
223 ## INFO 7 informational
224 ## DEBUG 8 debug-level messages
225 ## SPEW 9 Way too many details
227 ## Request this level of debugging output
228 default DEFAULT_CONSOLE_LOGLEVEL=7
229 ## At a maximum only compile in this level of debugging
230 default MAXIMUM_CONSOLE_LOGLEVEL=8
233 ## Select power on after power fail setting
234 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"