3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
5 uses USE_FAILOVER_IMAGE
6 uses HAVE_FAILOVER_BOOT
11 uses CONFIG_MAX_PHYSICAL_CPUS
12 uses CONFIG_LOGICAL_CPUS
21 uses ROM_SECTION_OFFSET
22 uses CONFIG_ROM_PAYLOAD
23 uses CONFIG_ROM_PAYLOAD_START
24 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
32 uses LB_CKS_RANGE_START
36 uses MAINBOARD_PART_NUMBER
38 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
39 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
40 uses LINUXBIOS_EXTRA_VERSION
50 uses DEFAULT_CONSOLE_LOGLEVEL
51 uses MAXIMUM_CONSOLE_LOGLEVEL
52 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
53 uses CONFIG_CONSOLE_SERIAL8250
57 uses CONFIG_CONSOLE_VGA
58 uses CONFIG_PCI_ROM_RUN
59 uses HW_MEM_HOLE_SIZEK
60 uses K8_HT_FREQ_1G_SUPPORT
69 uses ENABLE_APIC_EXT_ID
73 uses HT_CHAIN_UNITID_BASE
74 uses HT_CHAIN_END_UNITID_BASE
75 uses SB_HT_CHAIN_ON_BUS0
76 uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
78 uses CONFIG_LB_MEM_TOPK
80 ## ROM_SIZE is the size of boot ROM that this board will use.
82 default ROM_SIZE=524288
85 #default ROM_SIZE=1048576
88 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
90 #default FALLBACK_SIZE=131072
91 #default FALLBACK_SIZE=0x40000
94 default FALLBACK_SIZE=0x3f000
96 default FAILOVER_SIZE=0x01000
99 default CONFIG_LB_MEM_TOPK=2048
102 ## Build code for the fallback boot
104 default HAVE_FALLBACK_BOOT=1
105 default HAVE_FAILOVER_BOOT=1
108 ## Build code to reset the motherboard from linuxBIOS
110 default HAVE_HARD_RESET=1
113 ## Build code to export a programmable irq routing table
115 default HAVE_PIRQ_TABLE=1
116 default IRQ_SLOT_COUNT=11
119 ## Build code to export an x86 MP table
120 ## Useful for specifying IRQ routing values
122 default HAVE_MP_TABLE=1
125 ## Build code to export a CMOS option table
127 default HAVE_OPTION_TABLE=1
130 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
132 default LB_CKS_RANGE_START=49
133 default LB_CKS_RANGE_END=122
134 default LB_CKS_LOC=123
137 ## Build code for SMP support
138 ## Only worry about 2 micro processors
141 default CONFIG_MAX_CPUS=4
142 default CONFIG_MAX_PHYSICAL_CPUS=2
143 default CONFIG_LOGICAL_CPUS=1
145 default SERIAL_CPU_INIT=0
148 #default CONFIG_CHIP_NAME=1
151 default HW_MEM_HOLE_SIZEK=0x100000
153 ##HT Unit ID offset, default is 1, the typical one
154 default HT_CHAIN_UNITID_BASE=0x0
156 ##real SB Unit ID, default is 0x20, mean dont touch it at last
157 #default HT_CHAIN_END_UNITID_BASE=0x0
159 #make the SB HT chain on bus 0, default is not (0)
160 default SB_HT_CHAIN_ON_BUS0=2
162 ##only offset for SB chain?, default is yes(1)
163 default SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
165 #Opteron K8 1G HT Support
166 default K8_HT_FREQ_1G_SUPPORT=1
169 default CONFIG_CONSOLE_VGA=1
170 default CONFIG_PCI_ROM_RUN=1
173 ## enable CACHE_AS_RAM specifics
175 default USE_DCACHE_RAM=1
176 default DCACHE_RAM_BASE=0xcf000
177 default DCACHE_RAM_SIZE=0x1000
178 default CONFIG_USE_INIT=0
180 default ENABLE_APIC_EXT_ID=0
181 default APIC_ID_OFFSET=0x10
182 default LIFT_BSP_APIC_ID=0
186 ## Build code to setup a generic IOAPIC
188 default CONFIG_IOAPIC=1
191 ## Clean up the motherboard id strings
193 default MAINBOARD_PART_NUMBER="s2895"
194 default MAINBOARD_VENDOR="Tyan"
195 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1
196 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2895
199 ### LinuxBIOS layout values
202 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
203 default ROM_IMAGE_SIZE = 65536
206 ## Use a small 8K stack
208 default STACK_SIZE=0x2000
211 ## Use a small 16K heap
213 default HEAP_SIZE=0x4000
216 ## Only use the option table in a normal image
218 default USE_OPTION_TABLE = (!USE_FALLBACK_IMAGE) && (!USE_FAILOVER_IMAGE )
221 ## LinuxBIOS C code runs at this location in RAM
223 default _RAMBASE=0x00100000
226 ## Load the payload from the ROM
228 default CONFIG_ROM_PAYLOAD = 1
231 ### Defaults of options that you may want to override in the target config file
235 ## The default compiler
237 default CC="$(CROSS_COMPILE)gcc-4.0.2 -m32"
238 default HOSTCC="gcc-4.0.2"
241 ## Disable the gdb stub by default
243 default CONFIG_GDB_STUB=0
246 ## The Serial Console
249 # To Enable the Serial Console
250 default CONFIG_CONSOLE_SERIAL8250=1
252 ## Select the serial console baud rate
253 default TTYS0_BAUD=115200
254 #default TTYS0_BAUD=57600
255 #default TTYS0_BAUD=38400
256 #default TTYS0_BAUD=19200
257 #default TTYS0_BAUD=9600
258 #default TTYS0_BAUD=4800
259 #default TTYS0_BAUD=2400
260 #default TTYS0_BAUD=1200
262 # Select the serial console base port
263 default TTYS0_BASE=0x3f8
265 # Select the serial protocol
266 # This defaults to 8 data bits, 1 stop bit, and no parity
267 default TTYS0_LCS=0x3
270 ### Select the linuxBIOS loglevel
272 ## EMERG 1 system is unusable
273 ## ALERT 2 action must be taken immediately
274 ## CRIT 3 critical conditions
275 ## ERR 4 error conditions
276 ## WARNING 5 warning conditions
277 ## NOTICE 6 normal but significant condition
278 ## INFO 7 informational
279 ## DEBUG 8 debug-level messages
280 ## SPEW 9 Way too many details
282 ## Request this level of debugging output
283 default DEFAULT_CONSOLE_LOGLEVEL=8
284 ## At a maximum only compile in this level of debugging
285 default MAXIMUM_CONSOLE_LOGLEVEL=8
288 ## Select power on after power fail setting
289 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"