1 uses CONFIG_HAVE_MP_TABLE
3 uses CONFIG_HAVE_PIRQ_TABLE
4 uses CONFIG_USE_FALLBACK_IMAGE
5 uses CONFIG_HAVE_FALLBACK_BOOT
6 uses CONFIG_HAVE_HARD_RESET
7 uses CONFIG_IRQ_SLOT_COUNT
8 uses CONFIG_HAVE_OPTION_TABLE
10 uses CONFIG_MAX_PHYSICAL_CPUS
11 uses CONFIG_LOGICAL_CPUS
14 uses CONFIG_FALLBACK_SIZE
16 uses CONFIG_ROM_SECTION_SIZE
17 uses CONFIG_ROM_IMAGE_SIZE
18 uses CONFIG_ROM_SECTION_SIZE
19 uses CONFIG_ROM_SECTION_OFFSET
20 uses CONFIG_ROM_PAYLOAD
21 uses CONFIG_ROM_PAYLOAD_START
22 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
23 uses CONFIG_PRECOMPRESSED_PAYLOAD
24 uses CONFIG_PAYLOAD_SIZE
26 uses CONFIG_XIP_ROM_SIZE
27 uses CONFIG_XIP_ROM_BASE
28 uses CONFIG_STACK_SIZE
30 uses CONFIG_USE_OPTION_TABLE
31 uses CONFIG_LB_CKS_RANGE_START
32 uses CONFIG_LB_CKS_RANGE_END
33 uses CONFIG_LB_CKS_LOC
34 uses CONFIG_HAVE_ACPI_TABLES
35 uses CONFIG_HAVE_ACPI_RESUME
36 uses CONFIG_HAVE_LOW_TABLES
38 uses CONFIG_HAVE_SMI_HANDLER
40 uses CONFIG_MAINBOARD_PART_NUMBER
41 uses CONFIG_MAINBOARD_VENDOR
42 uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
43 uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
44 uses COREBOOT_EXTRA_VERSION
47 uses CONFIG_CROSS_COMPILE
51 uses CONFIG_TTYS0_BAUD
52 uses CONFIG_TTYS0_BASE
54 uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
55 uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
56 uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
57 uses CONFIG_CONSOLE_SERIAL8250
58 uses CONFIG_CONSOLE_BTEXT
59 uses CONFIG_HAVE_INIT_TIMER
61 uses CONFIG_CONSOLE_VGA
62 uses CONFIG_VGA_ROM_RUN
63 uses CONFIG_PCI_ROM_RUN
64 uses CONFIG_HW_MEM_HOLE_SIZEK
66 uses CONFIG_USE_DCACHE_RAM
67 uses CONFIG_DCACHE_RAM_BASE
68 uses CONFIG_DCACHE_RAM_SIZE
70 uses CONFIG_USE_PRINTK_IN_CAR
72 uses CONFIG_HT_CHAIN_UNITID_BASE
73 uses CONFIG_HT_CHAIN_END_UNITID_BASE
74 uses CONFIG_SB_HT_CHAIN_ON_BUS0
75 uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
77 uses CONFIG_LB_MEM_TOPK
79 ## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
80 default CONFIG_ROM_SIZE=1024*1024
83 ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
85 default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
92 ## Build code for the fallback boot
94 default CONFIG_HAVE_FALLBACK_BOOT=1
97 ## Build code to reset the motherboard from coreboot
99 default CONFIG_HAVE_HARD_RESET=1
104 default CONFIG_HAVE_SMI_HANDLER=0
107 ## Build code to export a programmable irq routing table
109 default CONFIG_HAVE_PIRQ_TABLE=1
110 default CONFIG_IRQ_SLOT_COUNT=11
113 ## Build code to export an x86 MP table
114 ## Useful for specifying IRQ routing values
116 default CONFIG_HAVE_MP_TABLE=1
119 ## Build code to provide ACPI support
121 default CONFIG_HAVE_ACPI_TABLES=1
122 default CONFIG_HAVE_LOW_TABLES=1
123 default CONFIG_MULTIBOOT=0
126 ## Build code to export a CMOS option table
128 default CONFIG_HAVE_OPTION_TABLE=1
131 ## Move the default coreboot cmos range off of AMD RTC registers
133 default CONFIG_LB_CKS_RANGE_START=49
134 default CONFIG_LB_CKS_RANGE_END=122
135 default CONFIG_LB_CKS_LOC=123
138 default CONFIG_CONSOLE_VGA=1
139 default CONFIG_PCI_ROM_RUN=1
140 default CONFIG_VGA_ROM_RUN=1
143 ## Build code for SMP support
144 ## Only worry about 2 micro processors
147 default CONFIG_MAX_CPUS=4
148 default CONFIG_MAX_PHYSICAL_CPUS=2
149 default CONFIG_LOGICAL_CPUS=1
152 default CONFIG_HW_MEM_HOLE_SIZEK=0x100000
154 ##HT Unit ID offset, default is 1, the typical one
155 default CONFIG_HT_CHAIN_UNITID_BASE=0x0
157 ##real SB Unit ID, default is 0x20, mean dont touch it at last
158 #default CONFIG_HT_CHAIN_END_UNITID_BASE=0x0
160 #make the SB HT chain on bus 0, default is not (0)
161 default CONFIG_SB_HT_CHAIN_ON_BUS0=2
163 ##only offset for SB chain?, default is yes(1)
164 default CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
167 #default CONFIG_CONSOLE_BTEXT=1
170 default CONFIG_CONSOLE_VGA=1
171 default CONFIG_PCI_ROM_RUN=1
174 ## enable CACHE_AS_RAM specifics
176 default CONFIG_USE_DCACHE_RAM=1
177 default CONFIG_DCACHE_RAM_BASE=0xcf000
178 default CONFIG_DCACHE_RAM_SIZE=0x1000
179 default CONFIG_USE_INIT=0
183 ## Build code to setup a generic IOAPIC
185 default CONFIG_IOAPIC=1
188 ## Clean up the motherboard id strings
190 default CONFIG_MAINBOARD_PART_NUMBER="s2892"
191 default CONFIG_MAINBOARD_VENDOR="Tyan"
192 default CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1
193 default CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2892
196 ### coreboot layout values
199 ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
200 default CONFIG_ROM_IMAGE_SIZE = 65536
203 ## Use a small 8K stack
205 default CONFIG_STACK_SIZE=0x2000
208 ## Use a small 16K heap
210 default CONFIG_HEAP_SIZE=0x4000
213 ## Only use the option table in a normal image
215 default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE
218 ## Coreboot C code runs at this location in RAM
220 default CONFIG_RAMBASE=0x00004000
223 ## Load the payload from the ROM
225 default CONFIG_ROM_PAYLOAD = 1
228 ### Defaults of options that you may want to override in the target config file
232 ## The default compiler
234 default CC="$(CONFIG_CROSS_COMPILE)gcc -m32"
238 ## Disable the gdb stub by default
240 default CONFIG_GDB_STUB=0
242 default CONFIG_USE_PRINTK_IN_CAR=1
245 ## The Serial Console
248 # To Enable the Serial Console
249 default CONFIG_CONSOLE_SERIAL8250=1
251 ## Select the serial console baud rate
252 default CONFIG_TTYS0_BAUD=115200
253 #default CONFIG_TTYS0_BAUD=57600
254 #default CONFIG_TTYS0_BAUD=38400
255 #default CONFIG_TTYS0_BAUD=19200
256 #default CONFIG_TTYS0_BAUD=9600
257 #default CONFIG_TTYS0_BAUD=4800
258 #default CONFIG_TTYS0_BAUD=2400
259 #default CONFIG_TTYS0_BAUD=1200
261 # Select the serial console base port
262 default CONFIG_TTYS0_BASE=0x3f8
264 # Select the serial protocol
265 # This defaults to 8 data bits, 1 stop bit, and no parity
266 default CONFIG_TTYS0_LCS=0x3
269 ### Select the coreboot loglevel
271 ## EMERG 1 system is unusable
272 ## ALERT 2 action must be taken immediately
273 ## CRIT 3 critical conditions
274 ## ERR 4 error conditions
275 ## WARNING 5 warning conditions
276 ## NOTICE 6 normal but significant condition
277 ## INFO 7 informational
278 ## CONFIG_DEBUG 8 debug-level messages
279 ## SPEW 9 Way too many details
281 ## Request this level of debugging output
282 default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
283 ## At a maximum only compile in this level of debugging
284 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
287 ## Select power on after power fail setting
288 default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
295 default CONFIG_CBFS=1