3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
9 uses CONFIG_MAX_PHYSICAL_CPUS
10 uses CONFIG_LOGICAL_CPUS
18 uses ROM_SECTION_OFFSET
19 uses CONFIG_ROM_STREAM
20 uses CONFIG_ROM_STREAM_START
28 uses LB_CKS_RANGE_START
31 uses MAINBOARD_PART_NUMBER
34 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
35 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
36 uses LINUXBIOS_EXTRA_VERSION
46 uses DEFAULT_CONSOLE_LOGLEVEL
47 uses MAXIMUM_CONSOLE_LOGLEVEL
48 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
49 uses CONFIG_CONSOLE_SERIAL8250
50 uses CONFIG_CONSOLE_BTEXT
54 uses CONFIG_CONSOLE_VGA
55 uses CONFIG_PCI_ROM_RUN
56 uses HW_MEM_HOLE_SIZEK
63 uses HT_CHAIN_UNITID_BASE
64 uses HT_CHAIN_END_UNITID_BASE
65 uses SB_HT_CHAIN_ON_BUS0
66 uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
68 uses CONFIG_LB_MEM_TOPK
70 ## ROM_SIZE is the size of boot ROM that this board will use.
72 default ROM_SIZE=524288
75 #default ROM_SIZE=1048576
79 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
81 #default FALLBACK_SIZE=131072
83 default FALLBACK_SIZE=0x40000
90 ## Build code for the fallback boot
92 default HAVE_FALLBACK_BOOT=1
95 ## Build code to reset the motherboard from linuxBIOS
97 default HAVE_HARD_RESET=1
100 ## Build code to export a programmable irq routing table
102 default HAVE_PIRQ_TABLE=1
103 default IRQ_SLOT_COUNT=11
106 ## Build code to export an x86 MP table
107 ## Useful for specifying IRQ routing values
109 default HAVE_MP_TABLE=1
112 ## Build code to export a CMOS option table
114 default HAVE_OPTION_TABLE=1
117 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
119 default LB_CKS_RANGE_START=49
120 default LB_CKS_RANGE_END=122
121 default LB_CKS_LOC=123
124 ## Build code for SMP support
125 ## Only worry about 2 micro processors
128 default CONFIG_MAX_CPUS=4
129 default CONFIG_MAX_PHYSICAL_CPUS=2
130 default CONFIG_LOGICAL_CPUS=1
132 ##HT Unit ID offset, default is 1, the typical one
133 default HT_CHAIN_UNITID_BASE=0x0
135 ##real SB Unit ID, default is 0x20, mean dont touch it at last
136 #default HT_CHAIN_END_UNITID_BASE=0x0
138 #make the SB HT chain on bus 0, default is not (0)
139 default SB_HT_CHAIN_ON_BUS0=2
141 ##only offset for SB chain?, default is yes(1)
142 default SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
145 default HW_MEM_HOLE_SIZEK=0x100000
148 #default CONFIG_CONSOLE_BTEXT=1
151 default CONFIG_CONSOLE_VGA=1
152 default CONFIG_PCI_ROM_RUN=1
155 ## enable CACHE_AS_RAM specifics
157 default USE_DCACHE_RAM=1
158 default DCACHE_RAM_BASE=0xcf000
159 default DCACHE_RAM_SIZE=0x1000
160 default CONFIG_USE_INIT=0
164 ## Build code to setup a generic IOAPIC
166 default CONFIG_IOAPIC=1
169 ## Clean up the motherboard id strings
171 default MAINBOARD_PART_NUMBER="s2892"
172 default MAINBOARD_VENDOR="Tyan"
173 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1
174 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2892
177 ### LinuxBIOS layout values
180 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
181 default ROM_IMAGE_SIZE = 65536
184 ## Use a small 8K stack
186 default STACK_SIZE=0x2000
189 ## Use a small 16K heap
191 default HEAP_SIZE=0x4000
194 ## Only use the option table in a normal image
196 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
199 ## LinuxBIOS C code runs at this location in RAM
201 default _RAMBASE=0x00004000
204 ## Load the payload from the ROM
206 default CONFIG_ROM_STREAM = 1
209 ### Defaults of options that you may want to override in the target config file
213 ## The default compiler
215 default CC="$(CROSS_COMPILE)gcc -m32"
219 ## Disable the gdb stub by default
221 default CONFIG_GDB_STUB=0
224 ## The Serial Console
227 # To Enable the Serial Console
228 default CONFIG_CONSOLE_SERIAL8250=1
230 ## Select the serial console baud rate
231 default TTYS0_BAUD=115200
232 #default TTYS0_BAUD=57600
233 #default TTYS0_BAUD=38400
234 #default TTYS0_BAUD=19200
235 #default TTYS0_BAUD=9600
236 #default TTYS0_BAUD=4800
237 #default TTYS0_BAUD=2400
238 #default TTYS0_BAUD=1200
240 # Select the serial console base port
241 default TTYS0_BASE=0x3f8
243 # Select the serial protocol
244 # This defaults to 8 data bits, 1 stop bit, and no parity
245 default TTYS0_LCS=0x3
248 ### Select the linuxBIOS loglevel
250 ## EMERG 1 system is unusable
251 ## ALERT 2 action must be taken immediately
252 ## CRIT 3 critical conditions
253 ## ERR 4 error conditions
254 ## WARNING 5 warning conditions
255 ## NOTICE 6 normal but significant condition
256 ## INFO 7 informational
257 ## DEBUG 8 debug-level messages
258 ## SPEW 9 Way too many details
260 ## Request this level of debugging output
261 default DEFAULT_CONSOLE_LOGLEVEL=8
262 ## At a maximum only compile in this level of debugging
263 default MAXIMUM_CONSOLE_LOGLEVEL=8
266 ## Select power on after power fail setting
267 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"