3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
9 uses CONFIG_MAX_PHYSICAL_CPUS
10 uses CONFIG_LOGICAL_CPUS
18 uses ROM_SECTION_OFFSET
19 uses CONFIG_ROM_PAYLOAD
20 uses CONFIG_ROM_PAYLOAD_START
21 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
22 uses CONFIG_PRECOMPRESSED_PAYLOAD
30 uses LB_CKS_RANGE_START
33 uses MAINBOARD_PART_NUMBER
36 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
37 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
38 uses LINUXBIOS_EXTRA_VERSION
48 uses DEFAULT_CONSOLE_LOGLEVEL
49 uses MAXIMUM_CONSOLE_LOGLEVEL
50 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
51 uses CONFIG_CONSOLE_SERIAL8250
52 uses CONFIG_CONSOLE_BTEXT
56 uses CONFIG_CONSOLE_VGA
57 uses CONFIG_PCI_ROM_RUN
58 uses HW_MEM_HOLE_SIZEK
65 uses HT_CHAIN_UNITID_BASE
66 uses HT_CHAIN_END_UNITID_BASE
67 uses SB_HT_CHAIN_ON_BUS0
68 uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
70 uses CONFIG_LB_MEM_TOPK
72 ## ROM_SIZE is the size of boot ROM that this board will use.
74 default ROM_SIZE=524288
77 #default ROM_SIZE=1048576
81 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
83 #default FALLBACK_SIZE=131072
85 default FALLBACK_SIZE=0x40000
92 ## Build code for the fallback boot
94 default HAVE_FALLBACK_BOOT=1
97 ## Build code to reset the motherboard from linuxBIOS
99 default HAVE_HARD_RESET=1
102 ## Build code to export a programmable irq routing table
104 default HAVE_PIRQ_TABLE=1
105 default IRQ_SLOT_COUNT=11
108 ## Build code to export an x86 MP table
109 ## Useful for specifying IRQ routing values
111 default HAVE_MP_TABLE=1
114 ## Build code to export a CMOS option table
116 default HAVE_OPTION_TABLE=1
119 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
121 default LB_CKS_RANGE_START=49
122 default LB_CKS_RANGE_END=122
123 default LB_CKS_LOC=123
126 ## Build code for SMP support
127 ## Only worry about 2 micro processors
130 default CONFIG_MAX_CPUS=4
131 default CONFIG_MAX_PHYSICAL_CPUS=2
132 default CONFIG_LOGICAL_CPUS=1
134 ##HT Unit ID offset, default is 1, the typical one
135 default HT_CHAIN_UNITID_BASE=0x0
137 ##real SB Unit ID, default is 0x20, mean dont touch it at last
138 #default HT_CHAIN_END_UNITID_BASE=0x0
140 #make the SB HT chain on bus 0, default is not (0)
141 default SB_HT_CHAIN_ON_BUS0=2
143 ##only offset for SB chain?, default is yes(1)
144 default SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
147 default HW_MEM_HOLE_SIZEK=0x100000
150 #default CONFIG_CONSOLE_BTEXT=1
153 default CONFIG_CONSOLE_VGA=1
154 default CONFIG_PCI_ROM_RUN=1
157 ## enable CACHE_AS_RAM specifics
159 default USE_DCACHE_RAM=1
160 default DCACHE_RAM_BASE=0xcf000
161 default DCACHE_RAM_SIZE=0x1000
162 default CONFIG_USE_INIT=0
166 ## Build code to setup a generic IOAPIC
168 default CONFIG_IOAPIC=1
171 ## Clean up the motherboard id strings
173 default MAINBOARD_PART_NUMBER="s2892"
174 default MAINBOARD_VENDOR="Tyan"
175 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1
176 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2892
179 ### LinuxBIOS layout values
182 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
183 default ROM_IMAGE_SIZE = 65536
186 ## Use a small 8K stack
188 default STACK_SIZE=0x2000
191 ## Use a small 16K heap
193 default HEAP_SIZE=0x4000
196 ## Only use the option table in a normal image
198 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
201 ## LinuxBIOS C code runs at this location in RAM
203 default _RAMBASE=0x00004000
206 ## Load the payload from the ROM
208 default CONFIG_ROM_PAYLOAD = 1
211 ### Defaults of options that you may want to override in the target config file
215 ## The default compiler
217 default CC="$(CROSS_COMPILE)gcc -m32"
221 ## Disable the gdb stub by default
223 default CONFIG_GDB_STUB=0
226 ## The Serial Console
229 # To Enable the Serial Console
230 default CONFIG_CONSOLE_SERIAL8250=1
232 ## Select the serial console baud rate
233 default TTYS0_BAUD=115200
234 #default TTYS0_BAUD=57600
235 #default TTYS0_BAUD=38400
236 #default TTYS0_BAUD=19200
237 #default TTYS0_BAUD=9600
238 #default TTYS0_BAUD=4800
239 #default TTYS0_BAUD=2400
240 #default TTYS0_BAUD=1200
242 # Select the serial console base port
243 default TTYS0_BASE=0x3f8
245 # Select the serial protocol
246 # This defaults to 8 data bits, 1 stop bit, and no parity
247 default TTYS0_LCS=0x3
250 ### Select the linuxBIOS loglevel
252 ## EMERG 1 system is unusable
253 ## ALERT 2 action must be taken immediately
254 ## CRIT 3 critical conditions
255 ## ERR 4 error conditions
256 ## WARNING 5 warning conditions
257 ## NOTICE 6 normal but significant condition
258 ## INFO 7 informational
259 ## DEBUG 8 debug-level messages
260 ## SPEW 9 Way too many details
262 ## Request this level of debugging output
263 default DEFAULT_CONSOLE_LOGLEVEL=8
264 ## At a maximum only compile in this level of debugging
265 default MAXIMUM_CONSOLE_LOGLEVEL=8
268 ## Select power on after power fail setting
269 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"