1 uses CONFIG_GENERATE_MP_TABLE
2 uses CONFIG_GENERATE_PIRQ_TABLE
3 uses CONFIG_USE_FALLBACK_IMAGE
4 uses CONFIG_HAVE_FALLBACK_BOOT
5 uses CONFIG_HAVE_HARD_RESET
6 uses CONFIG_IRQ_SLOT_COUNT
7 uses CONFIG_HAVE_OPTION_TABLE
9 uses CONFIG_MAX_PHYSICAL_CPUS
10 uses CONFIG_LOGICAL_CPUS
13 uses CONFIG_FALLBACK_SIZE
15 uses CONFIG_ROM_SECTION_SIZE
16 uses CONFIG_ROM_IMAGE_SIZE
17 uses CONFIG_ROM_SECTION_SIZE
18 uses CONFIG_ROM_SECTION_OFFSET
19 uses CONFIG_ROM_PAYLOAD
20 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
21 uses CONFIG_PRECOMPRESSED_PAYLOAD
23 uses CONFIG_XIP_ROM_SIZE
24 uses CONFIG_XIP_ROM_BASE
25 uses CONFIG_STACK_SIZE
27 uses CONFIG_USE_OPTION_TABLE
28 uses CONFIG_LB_CKS_RANGE_START
29 uses CONFIG_LB_CKS_RANGE_END
30 uses CONFIG_LB_CKS_LOC
31 uses CONFIG_GENERATE_ACPI_TABLES
32 uses CONFIG_HAVE_ACPI_RESUME
33 uses CONFIG_HAVE_LOW_TABLES
35 uses CONFIG_HAVE_SMI_HANDLER
37 uses CONFIG_MAINBOARD_PART_NUMBER
38 uses CONFIG_MAINBOARD_VENDOR
39 uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
40 uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
41 uses COREBOOT_EXTRA_VERSION
44 uses CONFIG_CROSS_COMPILE
48 uses CONFIG_TTYS0_BAUD
49 uses CONFIG_TTYS0_BASE
51 uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
52 uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
53 uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
54 uses CONFIG_CONSOLE_SERIAL8250
55 uses CONFIG_CONSOLE_BTEXT
56 uses CONFIG_HAVE_INIT_TIMER
58 uses CONFIG_CONSOLE_VGA
59 uses CONFIG_VGA_ROM_RUN
60 uses CONFIG_PCI_ROM_RUN
61 uses CONFIG_HW_MEM_HOLE_SIZEK
63 uses CONFIG_USE_DCACHE_RAM
64 uses CONFIG_DCACHE_RAM_BASE
65 uses CONFIG_DCACHE_RAM_SIZE
67 uses CONFIG_USE_PRINTK_IN_CAR
69 uses CONFIG_HT_CHAIN_UNITID_BASE
70 uses CONFIG_HT_CHAIN_END_UNITID_BASE
71 uses CONFIG_SB_HT_CHAIN_ON_BUS0
72 uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
74 ## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
75 default CONFIG_ROM_SIZE=1024*1024
78 ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
80 default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
87 ## Build code for the fallback boot
89 default CONFIG_HAVE_FALLBACK_BOOT=1
92 ## Build code to reset the motherboard from coreboot
94 default CONFIG_HAVE_HARD_RESET=1
99 default CONFIG_HAVE_SMI_HANDLER=0
102 ## Build code to export a programmable irq routing table
104 default CONFIG_GENERATE_PIRQ_TABLE=1
105 default CONFIG_IRQ_SLOT_COUNT=11
108 ## Build code to export an x86 MP table
109 ## Useful for specifying IRQ routing values
111 default CONFIG_GENERATE_MP_TABLE=1
114 ## Build code to provide ACPI support
116 default CONFIG_GENERATE_ACPI_TABLES=1
117 default CONFIG_HAVE_LOW_TABLES=1
118 default CONFIG_MULTIBOOT=0
121 ## Build code to export a CMOS option table
123 default CONFIG_HAVE_OPTION_TABLE=1
126 ## Move the default coreboot cmos range off of AMD RTC registers
128 default CONFIG_LB_CKS_RANGE_START=49
129 default CONFIG_LB_CKS_RANGE_END=122
130 default CONFIG_LB_CKS_LOC=123
133 default CONFIG_CONSOLE_VGA=1
134 default CONFIG_PCI_ROM_RUN=1
135 default CONFIG_VGA_ROM_RUN=1
138 ## Build code for SMP support
139 ## Only worry about 2 micro processors
142 default CONFIG_MAX_CPUS=4
143 default CONFIG_MAX_PHYSICAL_CPUS=2
144 default CONFIG_LOGICAL_CPUS=1
147 default CONFIG_HW_MEM_HOLE_SIZEK=0x100000
149 ##HT Unit ID offset, default is 1, the typical one
150 default CONFIG_HT_CHAIN_UNITID_BASE=0x0
152 ##real SB Unit ID, default is 0x20, mean dont touch it at last
153 #default CONFIG_HT_CHAIN_END_UNITID_BASE=0x0
155 #make the SB HT chain on bus 0, default is not (0)
156 default CONFIG_SB_HT_CHAIN_ON_BUS0=2
158 ##only offset for SB chain?, default is yes(1)
159 default CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
162 #default CONFIG_CONSOLE_BTEXT=1
165 default CONFIG_CONSOLE_VGA=1
166 default CONFIG_PCI_ROM_RUN=1
169 ## enable CACHE_AS_RAM specifics
171 default CONFIG_USE_DCACHE_RAM=1
172 default CONFIG_DCACHE_RAM_BASE=0xcf000
173 default CONFIG_DCACHE_RAM_SIZE=0x1000
174 default CONFIG_USE_INIT=0
178 ## Build code to setup a generic IOAPIC
180 default CONFIG_IOAPIC=1
183 ## Clean up the motherboard id strings
185 default CONFIG_MAINBOARD_PART_NUMBER="s2892"
186 default CONFIG_MAINBOARD_VENDOR="Tyan"
187 default CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1
188 default CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2892
191 ### coreboot layout values
194 ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
195 default CONFIG_ROM_IMAGE_SIZE = 65536
198 ## Use a small 8K stack
200 default CONFIG_STACK_SIZE=0x2000
203 ## Use a small 16K heap
205 default CONFIG_HEAP_SIZE=0x4000
208 ## Only use the option table in a normal image
210 default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE
213 ## Coreboot C code runs at this location in RAM
215 default CONFIG_RAMBASE=0x00004000
218 ## Load the payload from the ROM
220 default CONFIG_ROM_PAYLOAD = 1
223 ### Defaults of options that you may want to override in the target config file
227 ## The default compiler
229 default CC="$(CONFIG_CROSS_COMPILE)gcc -m32"
233 ## Disable the gdb stub by default
235 default CONFIG_GDB_STUB=0
237 default CONFIG_USE_PRINTK_IN_CAR=1
240 ## The Serial Console
243 # To Enable the Serial Console
244 default CONFIG_CONSOLE_SERIAL8250=1
246 ## Select the serial console baud rate
247 default CONFIG_TTYS0_BAUD=115200
248 #default CONFIG_TTYS0_BAUD=57600
249 #default CONFIG_TTYS0_BAUD=38400
250 #default CONFIG_TTYS0_BAUD=19200
251 #default CONFIG_TTYS0_BAUD=9600
252 #default CONFIG_TTYS0_BAUD=4800
253 #default CONFIG_TTYS0_BAUD=2400
254 #default CONFIG_TTYS0_BAUD=1200
256 # Select the serial console base port
257 default CONFIG_TTYS0_BASE=0x3f8
259 # Select the serial protocol
260 # This defaults to 8 data bits, 1 stop bit, and no parity
261 default CONFIG_TTYS0_LCS=0x3
264 ### Select the coreboot loglevel
266 ## EMERG 1 system is unusable
267 ## ALERT 2 action must be taken immediately
268 ## CRIT 3 critical conditions
269 ## ERR 4 error conditions
270 ## WARNING 5 warning conditions
271 ## NOTICE 6 normal but significant condition
272 ## INFO 7 informational
273 ## CONFIG_DEBUG 8 debug-level messages
274 ## SPEW 9 Way too many details
276 ## Request this level of debugging output
277 default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
278 ## At a maximum only compile in this level of debugging
279 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
282 ## Select power on after power fail setting
283 default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"