1 ## CONFIG_XIP_ROM_SIZE must be a power of 2.
2 default CONFIG_XIP_ROM_SIZE = 64 * 1024
3 include /config/nofailovercalculation.lb
4 default CONFIG_ROM_PAYLOAD = 1
10 ## Build the objects we have code for in this directory.
15 #dir /drivers/ati/ragexl
17 #needed by irq_tables and mptable and acpi_tables
20 if CONFIG_GENERATE_MP_TABLE object mptable.o end
21 if CONFIG_GENERATE_PIRQ_TABLE object irq_tables.o end
24 if CONFIG_GENERATE_ACPI_TABLES
27 depends "$(CONFIG_MAINBOARD)/dsdt.dsl"
28 action "iasl -p $(CURDIR)/dsdt -tc $(CONFIG_MAINBOARD)/dsdt.dsl"
29 action "mv dsdt.hex dsdt.c"
32 #./ssdt.o is moved to northbridge/amd/amdk8/Config.lb
33 #./fadt.o is moved to southbridge/nvidia/ck804/Config.lb
38 depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
39 action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
43 depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
44 action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
45 action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
46 action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
51 ## Build our 16 bit and 32 bit coreboot entry code
53 if CONFIG_USE_FALLBACK_IMAGE
54 mainboardinit cpu/x86/16bit/entry16.inc
55 ldscript /cpu/x86/16bit/entry16.lds
58 mainboardinit cpu/x86/32bit/entry32.inc
61 ldscript /cpu/x86/32bit/entry32.lds
65 ldscript /cpu/amd/car/cache_as_ram.lds
69 ## Build our reset vector (This is where coreboot is entered)
71 if CONFIG_USE_FALLBACK_IMAGE
72 mainboardinit cpu/x86/16bit/reset16.inc
73 ldscript /cpu/x86/16bit/reset16.lds
75 mainboardinit cpu/x86/32bit/reset32.inc
76 ldscript /cpu/x86/32bit/reset32.lds
80 ## Include an id string (For safe flashing)
82 mainboardinit southbridge/nvidia/ck804/id.inc
83 ldscript /southbridge/nvidia/ck804/id.lds
86 ## ROMSTRAP table for CK804
88 if CONFIG_USE_FALLBACK_IMAGE
89 mainboardinit southbridge/nvidia/ck804/romstrap.inc
90 ldscript /southbridge/nvidia/ck804/romstrap.lds
96 mainboardinit cpu/amd/car/cache_as_ram.inc
99 ### This is the early phase of coreboot startup
100 ### Things are delicate and we test to see if we should
101 ### failover to another image.
103 if CONFIG_USE_FALLBACK_IMAGE
104 ldscript /arch/i386/lib/failover.lds
108 ### O.k. We aren't just an intermediary anymore!
117 mainboardinit ./auto.inc
121 ## Include the secondary Configuration files
125 include devicetree.cb