1 #include <console/console.h>
2 #include <arch/smp/mpspec.h>
3 #include <device/pci.h>
7 extern unsigned char bus_isa;
8 extern unsigned char bus_ck804_0; //1
9 extern unsigned char bus_ck804_1; //2
10 extern unsigned char bus_ck804_2; //3
11 extern unsigned char bus_ck804_3; //4
12 extern unsigned char bus_ck804_4; //5
13 extern unsigned char bus_ck804_5; //6
14 extern unsigned char bus_8131_0;//7
15 extern unsigned char bus_8131_1;//8
16 extern unsigned char bus_8131_2;//9
17 extern unsigned apicid_ck804;
18 extern unsigned apicid_8131_1;
19 extern unsigned apicid_8131_2;
22 extern unsigned hcdn[];
23 extern unsigned sbdn3;
25 extern void get_bus_conf(void);
27 void *smp_write_config_table(void *v)
29 static const char sig[4] = "PCMP";
30 static const char oem[8] = "TYAN ";
31 static const char productid[12] = "S2891 ";
32 struct mp_config_table *mc;
34 unsigned char bus_num;
37 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
38 memset(mc, 0, sizeof(*mc));
40 memcpy(mc->mpc_signature, sig, sizeof(sig));
41 mc->mpc_length = sizeof(*mc); /* initially just the header */
43 mc->mpc_checksum = 0; /* not yet computed */
44 memcpy(mc->mpc_oem, oem, sizeof(oem));
45 memcpy(mc->mpc_productid, productid, sizeof(productid));
48 mc->mpc_entry_count = 0; /* No entries yet... */
49 mc->mpc_lapic = LAPIC_ADDR;
54 smp_write_processors(mc);
59 /* define bus and isa numbers */
60 for(bus_num = 0; bus_num < bus_isa; bus_num++) {
61 smp_write_bus(mc, bus_num, "PCI ");
63 smp_write_bus(mc, bus_isa, "ISA ");
65 /*I/O APICs: APIC ID Version State Address*/
71 dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn+ 0x1,0));
73 res = find_resource(dev, PCI_BASE_ADDRESS_1);
75 smp_write_ioapic(mc, apicid_ck804, 0x11, res->base);
80 pci_write_config32(dev, 0x7c, dword);
83 pci_write_config32(dev, 0x80, dword);
87 pci_write_config32(dev, 0x84, dword);
91 dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,1));
93 res = find_resource(dev, PCI_BASE_ADDRESS_0);
95 smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base);
98 dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,1));
100 res = find_resource(dev, PCI_BASE_ADDRESS_0);
102 smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base);
108 /*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#
109 */ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_ck804, 0x0);
110 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid_ck804, 0x1);
111 smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_ck804, 0x2);
112 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x3, apicid_ck804, 0x3);
113 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x4, apicid_ck804, 0x4);
114 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x6, apicid_ck804, 0x6);
115 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x7, apicid_ck804, 0x7);
116 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x8, apicid_ck804, 0x8);
117 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xc, apicid_ck804, 0xc);
118 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xd, apicid_ck804, 0xd);
119 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid_ck804, 0xe);
120 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_ck804, 0xf);
122 // Onboard ck804 smbus
123 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+1)<<2)|1, apicid_ck804, 0xa);
126 // Onboard ck804 USB 1.1
127 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+2)<<2)|0, apicid_ck804, 0x15); // 21
129 // Onboard ck804 USB 2
130 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+2)<<2)|1, apicid_ck804, 0x14); // 20
132 // Onboard ck804 SATA 0
133 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn +7)<<2)|0, apicid_ck804, 0x17); // 23
135 // Onboard ck804 SATA 1
136 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn +8)<<2)|0, apicid_ck804, 0x16); // 22
140 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_5, (0x00<<2)|i, apicid_ck804, 0x10 + (2+i+4-sbdn%4)%4);
145 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_4, (0x00<<2)|i, apicid_ck804, 0x10 + (1+i+4-sbdn%4)%4);
149 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_1, (7<<2)|0, apicid_ck804, 0x13); // 19
154 //Onboard Broadcom NIC
156 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (9<<2)|i, apicid_8131_2, (0+i)%4); //28
161 //Slot 4 PCIX 133/100/66
163 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|i, apicid_8131_1, (0+i)%4); //24
166 //Slot 3 PCIX 133/100/66 SoDIMM PCI
168 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (0xa<<2)|i, apicid_8131_1, (2+i)%4); //26
171 /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
172 smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
173 smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
174 /* There is no extension information... */
176 /* Compute the checksums */
177 mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
178 mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
179 printk_debug("Wrote the mp table end at: %p - %p\n",
180 mc, smp_next_mpe_entry(mc));
181 return smp_next_mpe_entry(mc);
184 unsigned long write_smp_table(unsigned long addr)
187 v = smp_write_floating_table(addr);
188 return (unsigned long)smp_write_config_table(v);