Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-34
[coreboot.git] / src / mainboard / tyan / s2891 / failover.c
1 #define ASSEMBLY 1
2 #include <stdint.h>
3 #include <device/pci_def.h>
4 #include <device/pci_ids.h>
5 #include <arch/io.h>
6 #include <arch/romcc_io.h>
7 #include <cpu/x86/lapic.h>
8 #include "pc80/mc146818rtc_early.c"
9
10 #include "southbridge/nvidia/ck804/ck804_enable_rom.c"
11 #include "northbridge/amd/amdk8/early_ht.c"
12 #include "cpu/x86/lapic/boot_cpu.c"
13 #include "northbridge/amd/amdk8/reset_test.c"
14
15 static void sio_setup(void)
16 {
17         
18         unsigned value;
19         uint32_t dword;
20         uint8_t byte;
21
22         byte = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0x7b);
23         byte |= 0x20; 
24         pci_write_config8(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0x7b, byte);
25         
26         dword = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa0);
27         dword |= (1<<0) | (1<<1);  
28         pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa0, dword);
29
30 #if 1
31         dword = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa4);
32         dword |= (1<<16);  
33         pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa4, dword);
34
35 #endif
36
37 }
38
39 #if CONFIG_LOGICAL_CPUS==1
40 #include "cpu/amd/dualcore/dualcore_id.c"
41 #endif
42
43 static unsigned long main(unsigned long bist)
44 {
45 #if CONFIG_LOGICAL_CPUS==1
46         struct node_core_id id;
47 #else
48         unsigned nodeid;
49 #endif
50         /* Make cerain my local apic is useable */
51         enable_lapic();
52
53 #if CONFIG_LOGICAL_CPUS==1
54         id = get_node_core_id_x();
55         /* Is this a cpu only reset? */
56         if (cpu_init_detected(id.nodeid)) {
57 #else
58         nodeid = lapicid();
59         /* Is this a cpu only reset? */
60         if (cpu_init_detected(nodeid)) {
61 #endif
62                 if (last_boot_normal()) {
63                         goto normal_image;
64                 } else {
65                         goto cpu_reset;
66                 }
67         }
68         
69         /* Is this a secondary cpu? */
70         if (!boot_cpu()) {
71                 if (last_boot_normal()) {
72                         goto normal_image;
73                 } else {
74                         goto fallback_image;
75                 }
76         }
77
78         /* Nothing special needs to be done to find bus 0 */
79         /* Allow the HT devices to be found */
80         
81         enumerate_ht_chain();
82
83         sio_setup();
84
85         /* Setup the ck804 */
86         ck804_enable_rom();
87
88         /* Is this a deliberate reset by the bios */
89         if (bios_reset_detected() && last_boot_normal()) {
90                 goto normal_image;
91         }
92         /* This is the primary cpu how should I boot? */
93         else if (do_normal_boot()) {
94                 goto normal_image;
95         }
96         else {
97                 goto fallback_image;
98         }
99  normal_image:
100         asm volatile ("jmp __normal_image" 
101                 : /* outputs */ 
102                 : "a" (bist) /* inputs */
103                 : /* clobbers */
104                 );
105  cpu_reset:
106 #if 0
107         //CPU reset will reset memtroller ???
108         asm volatile ("jmp __cpu_reset" 
109                 : /* outputs */ 
110                 : "a"(bist) /* inputs */
111                 : /* clobbers */
112                 );
113 #endif
114
115  fallback_image:
116         return bist;
117 }