2 * This file is part of the coreboot project.
4 * Copyright (C) 2004 Nick Barker <Nick.Barker9@btinternet.com>
5 * Copyright (C) 2007, 2008 Rudolf Marek <r.marek@assembler.cz>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * ISA portions taken from QEMU acpi-dsdt.dsl.
25 DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "CB-DSDT ", 1)
27 #include "northbridge/amd/amdk8/amdk8_util.asl"
29 /* For now only define 2 power states:
30 * - S0 which is fully on
31 * - S5 which is soft off
32 * Any others would involve declaring the wake up methods.
34 Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 })
35 Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 })
37 /* Root of the bus hierarchy */
40 /* Top PCI device (CK804) */
43 Name (_HID, EisaId ("PNP0A03"))
57 Method (_CRS, 0, NotSerialized)
59 Name (BUF0, ResourceTemplate ()
62 0x0CF8, // Address Range Minimum
63 0x0CF8, // Address Range Maximum
64 0x01, // Address Alignment
65 0x08, // Address Length
67 WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
68 0x0000, // Address Space Granularity
69 0x0000, // Address Range Minimum
70 0x0CF7, // Address Range Maximum
71 0x0000, // Address Translation Offset
72 0x0CF8, // Address Length
75 /* Methods bellow use SSDT to get actual MMIO regs
76 The IO ports are from 0xd00, optionally an VGA,
77 otherwise the info from MMIO is used.
80 Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
81 Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
82 Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)
86 /* PCI Routing Table */
87 Name (_PRT, Package () {
88 /* Since source is 0, index is IRQ. */
89 /* in ABCD, A=0, B=1, C=2, D=3 */
90 /* SlotFFFF, ABCD, source, index */
91 Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x0A }, /* 0x1 SMBUS IRQ 10 */
92 Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x15 }, /* 0x2 USB IRQ 21 */
93 Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x14 }, /* 0x2 USB IRQ 20 */
94 Package (0x04) { 0x0007FFFF, 0x00, 0x00, 0x17 }, /* 0x7 SATA 0 IRQ 23 */
95 Package (0x04) { 0x0008FFFF, 0x00, 0x00, 0x16 }, /* 0x8 SATA 1 IRQ 22 */
100 Name (_ADR, 0x00090000)
103 Name (_PRT, Package () {
104 Package (0x04) { 0x0007FFFF, 0x00, 0x00, 0x12 }, /* 1:06 Onboard ATI Rage IRQ 18 */
108 /* 2:00 PCIe x16 SB IRQ 18 */
111 Name (_ADR, 0x000e0000)
114 Name (_PRT, Package () {
115 Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x12 }, /* PCIE IRQ16-IRQ19 */
116 Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x13 },
117 Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x10 },
118 Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x11 },
122 /* 2:00 PCIe x4 SB IRQ 17 */
125 Name (_ADR, 0x000e0000)
128 Name (_PRT, Package () {
129 Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x11 }, /* PCIE IRQ16-IRQ19 */
130 Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x12 },
131 Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x13 },
132 Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x10 },
137 Name (_HID, EisaId ("PNP0A05"))
138 Name (_ADR, 0x00010000)
140 /* PS/2 keyboard (seems to be important for WinXP install) */
143 Name (_HID, EisaId ("PNP0303"))
144 Method (_STA, 0, NotSerialized)
148 Method (_CRS, 0, NotSerialized)
150 Name (TMP, ResourceTemplate () {
151 IO (Decode16, 0x0060, 0x0060, 0x01, 0x01)
152 IO (Decode16, 0x0064, 0x0064, 0x01, 0x01)
162 Name (_HID, EisaId ("PNP0F13"))
163 Method (_STA, 0, NotSerialized)
167 Method (_CRS, 0, NotSerialized)
169 Name (TMP, ResourceTemplate () {
179 Name (_HID, EisaId ("PNP0400")) // "PNP0401" for ECP
180 Method (_STA, 0, NotSerialized)
184 Method (_CRS, 0, NotSerialized)
186 Name (TMP, ResourceTemplate () {
187 FixedIO (0x0378, 0x10)
194 /* Floppy controller */
197 Name (_HID, EisaId ("PNP0700"))
198 Method (_STA, 0, NotSerialized)
202 Method (_CRS, 0, NotSerialized)
204 Name (BUF0, ResourceTemplate () {
205 FixedIO (0x03F0, 0x08)
207 DMA (Compatibility, NotBusMaster, Transfer8) {2}
215 /* AMD 8131 PCI-X tunnel */
218 Name (_HID, EisaId ("PNP0A03"))
223 /* There is no _PRT Here because I don't know what to
224 * put in it. Since the 8131 has its own APIC, it
225 * isn't wired to other IRQs. */
227 Method (_CRS, 0, NotSerialized)
229 Name (BUF0, ResourceTemplate ()
232 0x0CF8, // Address Range Minimum
233 0x0CF8, // Address Range Maximum
234 0x01, // Address Alignment
235 0x08, // Address Length
238 /* Methods bellow use SSDT to get actual MMIO regs
239 The IO ports are from 0xd00, optionally an VGA,
240 otherwise the info from MMIO is used.
241 \_SB.GXXX(node, link)
243 Concatenate (\_SB.GMEM (0x00, 0x02), BUF0, Local1)
244 Concatenate (\_SB.GIOR (0x00, 0x02), Local1, Local2)
245 Concatenate (\_SB.GWBN (0x00, 0x02), Local2, Local3)
249 /* Channel A PCIX 133 */
252 Name (_ADR, 0x00000000)
255 Name (_PRT, Package () {
256 Package (0x04) { 0x0008FFFF, 0x00, 0x00, 0x18 }, /* PCIE IRQ24-IRQ27 shifted 3*/
257 Package (0x04) { 0x0008FFFF, 0x01, 0x00, 0x10 },
258 Package (0x04) { 0x0008FFFF, 0x02, 0x00, 0x1a },
259 Package (0x04) { 0x0008FFFF, 0x03, 0x00, 0x1b },
260 Package (0x04) { 0x000aFFFF, 0x00, 0x00, 0x1a }, /* PCIE IRQ24-IRQ27 shifted 2*/
261 Package (0x04) { 0x000aFFFF, 0x01, 0x00, 0x1b },
262 Package (0x04) { 0x000aFFFF, 0x02, 0x00, 0x18 },
263 Package (0x04) { 0x000aFFFF, 0x03, 0x00, 0x19 },
267 /* Channel B PCIX 100 */
268 Device (PCXS) /* Onboard NIC */
270 Name (_ADR, 0x00010000)
273 Name (_PRT, Package () {
274 Package (0x04) { 0x0009FFFF, 0x00, 0x00, 0x1c }, /* PCIE IRQ28-IRQ31 */
275 Package (0x04) { 0x0009FFFF, 0x01, 0x00, 0x1d },
276 Package (0x04) { 0x0009FFFF, 0x02, 0x00, 0x1e },
277 Package (0x04) { 0x0009FFFF, 0x03, 0x00, 0x1f },