3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
9 uses CONFIG_MAX_PHYSICAL_CPUS
10 uses CONFIG_LOGICAL_CPUS
18 uses ROM_SECTION_OFFSET
19 uses CONFIG_ROM_STREAM
20 uses CONFIG_ROM_STREAM_START
28 uses LB_CKS_RANGE_START
31 uses MAINBOARD_PART_NUMBER
34 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
35 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
36 uses LINUXBIOS_EXTRA_VERSION
46 uses DEFAULT_CONSOLE_LOGLEVEL
47 uses MAXIMUM_CONSOLE_LOGLEVEL
48 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
49 uses CONFIG_CONSOLE_SERIAL8250
50 uses CONFIG_CONSOLE_BTEXT
54 uses CONFIG_CONSOLE_VGA
55 uses CONFIG_PCI_ROM_RUN
56 uses HW_MEM_HOLE_SIZEK
63 uses ENABLE_APIC_EXT_ID
67 uses CONFIG_PCI_64BIT_PREF_MEM
69 uses HT_CHAIN_UNITID_BASE
70 uses HT_CHAIN_END_UNITID_BASE
71 uses SB_HT_CHAIN_ON_BUS0
72 uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
74 uses CONFIG_LB_MEM_TOPK
77 ## ROM_SIZE is the size of boot ROM that this board will use.
79 default ROM_SIZE=524288
82 #default ROM_SIZE=1048576
86 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
88 #default FALLBACK_SIZE=131072
90 default FALLBACK_SIZE=0x40000
97 ## Build code for the fallback boot
99 default HAVE_FALLBACK_BOOT=1
102 ## Build code to reset the motherboard from linuxBIOS
104 default HAVE_HARD_RESET=1
107 ## Build code to export a programmable irq routing table
109 default HAVE_PIRQ_TABLE=1
110 default IRQ_SLOT_COUNT=11
113 ## Build code to export an x86 MP table
114 ## Useful for specifying IRQ routing values
116 default HAVE_MP_TABLE=1
119 ## Build code to export a CMOS option table
121 default HAVE_OPTION_TABLE=1
124 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
126 default LB_CKS_RANGE_START=49
127 default LB_CKS_RANGE_END=122
128 default LB_CKS_LOC=123
131 ## Build code for SMP support
132 ## Only worry about 2 micro processors
135 default CONFIG_MAX_CPUS=4
136 default CONFIG_MAX_PHYSICAL_CPUS=2
137 default CONFIG_LOGICAL_CPUS=1
140 default HW_MEM_HOLE_SIZEK=0x100000
142 ##HT Unit ID offset, default is 1, the typical one
143 default HT_CHAIN_UNITID_BASE=0x0
145 ##real SB Unit ID, default is 0x20, mean dont touch it at last
146 #default HT_CHAIN_END_UNITID_BASE=0x0
148 #make the SB HT chain on bus 0, default is not (0)
149 default SB_HT_CHAIN_ON_BUS0=2
151 ##only offset for SB chain?, default is yes(1)
152 #default SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
155 #default CONFIG_CONSOLE_BTEXT=1
158 default CONFIG_CONSOLE_VGA=1
159 default CONFIG_PCI_ROM_RUN=1
162 ## enable CACHE_AS_RAM specifics
164 default USE_DCACHE_RAM=1
165 default DCACHE_RAM_BASE=0xcf000
166 default DCACHE_RAM_SIZE=0x1000
167 default CONFIG_USE_INIT=0
169 default ENABLE_APIC_EXT_ID=0
170 default APIC_ID_OFFSET=0x10
171 default LIFT_BSP_APIC_ID=0
174 #default CONFIG_PCI_64BIT_PREF_MEM=1
177 ## Build code to setup a generic IOAPIC
179 default CONFIG_IOAPIC=1
182 ## Clean up the motherboard id strings
184 default MAINBOARD_PART_NUMBER="s2891"
185 default MAINBOARD_VENDOR="Tyan"
186 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1
187 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2891
190 ### LinuxBIOS layout values
193 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
194 default ROM_IMAGE_SIZE = 65536
197 ## Use a small 8K stack
199 default STACK_SIZE=0x2000
202 ## Use a small 16K heap
204 default HEAP_SIZE=0x4000
207 ## Only use the option table in a normal image
209 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
212 ## LinuxBIOS C code runs at this location in RAM
214 default _RAMBASE=0x00004000
217 ## Load the payload from the ROM
219 default CONFIG_ROM_STREAM = 1
222 ### Defaults of options that you may want to override in the target config file
226 ## The default compiler
228 default CC="$(CROSS_COMPILE)gcc-3.3.6 -m32"
229 default HOSTCC="gcc-3.3.6"
232 ## Disable the gdb stub by default
234 default CONFIG_GDB_STUB=0
237 ## The Serial Console
240 # To Enable the Serial Console
241 default CONFIG_CONSOLE_SERIAL8250=1
243 ## Select the serial console baud rate
244 default TTYS0_BAUD=115200
245 #default TTYS0_BAUD=57600
246 #default TTYS0_BAUD=38400
247 #default TTYS0_BAUD=19200
248 #default TTYS0_BAUD=9600
249 #default TTYS0_BAUD=4800
250 #default TTYS0_BAUD=2400
251 #default TTYS0_BAUD=1200
253 # Select the serial console base port
254 default TTYS0_BASE=0x3f8
256 # Select the serial protocol
257 # This defaults to 8 data bits, 1 stop bit, and no parity
258 default TTYS0_LCS=0x3
261 ### Select the linuxBIOS loglevel
263 ## EMERG 1 system is unusable
264 ## ALERT 2 action must be taken immediately
265 ## CRIT 3 critical conditions
266 ## ERR 4 error conditions
267 ## WARNING 5 warning conditions
268 ## NOTICE 6 normal but significant condition
269 ## INFO 7 informational
270 ## DEBUG 8 debug-level messages
271 ## SPEW 9 Way too many details
273 ## Request this level of debugging output
274 default DEFAULT_CONSOLE_LOGLEVEL=8
275 ## At a maximum only compile in this level of debugging
276 default MAXIMUM_CONSOLE_LOGLEVEL=8
279 ## Select power on after power fail setting
280 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"