src/mainboard/tyan/s2891/Config.lb

   1 ##
   2 ## Compute the location and size of where this firmware image
   3 ## (linuxBIOS plus bootloader) will live in the boot rom chip.
   4 ##
   5 if USE_FALLBACK_IMAGE
   6         default ROM_SECTION_SIZE   = FALLBACK_SIZE
   7         default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
   8 else
   9         default ROM_SECTION_SIZE   = ( ROM_SIZE - FALLBACK_SIZE )
  10         default ROM_SECTION_OFFSET = 0
  11 end
  12
  13 ##
  14 ## Compute the start location and size size of
  15 ## The linuxBIOS bootloader.
  16 ##
  17 default PAYLOAD_SIZE            = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
  18 default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
  19 default CONFIG_ROM_STREAM     = 1
  20
  21 ##
  22 ## Compute where this copy of linuxBIOS will start in the boot rom
  23 ##
  24 default _ROMBASE      = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )
  25
  26 ##
  27 ## Compute a range of ROM that can cached to speed up linuxBIOS,
  28 ## execution speed.
  29 ##
  30 ## XIP_ROM_SIZE must be a power of 2.
  31 ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
  32 ##
  33 default XIP_ROM_SIZE=65536
  34 default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
  35
  36 arch i386 end
  37
  38
  39 ##
  40 ## Build the objects we have code for in this directory.
  41 ##
  42
  43 driver mainboard.o
  44
  45 #dir /drivers/ati/ragexl
  46
  47 if HAVE_MP_TABLE object mptable.o end
  48 if HAVE_PIRQ_TABLE object irq_tables.o end
  49 #object reset.o
  50 ##
  51 ## Romcc output
  52 ##
  53 makerule ./failover.E
  54         depends "$(MAINBOARD)/failover.c ./romcc"
  55         action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
  56 end
  57
  58 makerule ./failover.inc
  59         depends "$(MAINBOARD)/failover.c ./romcc"
  60         action "./romcc    -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
  61 end
  62
  63 makerule ./auto.E
  64         depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
  65         action  "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
  66 end
  67 makerule ./auto.inc
  68         depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
  69         action  "./romcc    -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
  70 end
  71
  72 ##
  73 ## Build our 16 bit and 32 bit linuxBIOS entry code
  74 ##
  75 mainboardinit cpu/x86/16bit/entry16.inc
  76 mainboardinit cpu/x86/32bit/entry32.inc
  77 ldscript /cpu/x86/16bit/entry16.lds
  78 ldscript /cpu/x86/32bit/entry32.lds
  79
  80 ##
  81 ## Build our reset vector (This is where linuxBIOS is entered)
  82 ##
  83 if USE_FALLBACK_IMAGE
  84         mainboardinit cpu/x86/16bit/reset16.inc
  85         ldscript /cpu/x86/16bit/reset16.lds
  86 else
  87         mainboardinit cpu/x86/32bit/reset32.inc
  88         ldscript /cpu/x86/32bit/reset32.lds
  89 end
  90
  91 ### Should this be in the northbridge code?
  92 mainboardinit arch/i386/lib/cpu_reset.inc
  93
  94 ##
  95 ## Include an id string (For safe flashing)
  96 ##
  97 mainboardinit southbridge/nvidia/ck804/id.inc
  98 ldscript /southbridge/nvidia/ck804/id.lds
  99
 100 ##
 101 ## ROMSTRAP table for CK804
 102 ##
 103 if USE_FALLBACK_IMAGE
 104         mainboardinit southbridge/nvidia/ck804/romstrap.inc
 105         ldscript /southbridge/nvidia/ck804/romstrap.lds
 106 end
 107
 108 ###
 109 ### This is the early phase of linuxBIOS startup
 110 ### Things are delicate and we test to see if we should
 111 ### failover to another image.
 112 ###
 113 if USE_FALLBACK_IMAGE
 114         ldscript /arch/i386/lib/failover.lds
 115         mainboardinit ./failover.inc
 116 end
 117
 118 ###
 119 ### O.k. We aren't just an intermediary anymore!
 120 ###
 121
 122 ##
 123 ## Setup RAM
 124 ##
 125 mainboardinit cpu/x86/fpu/enable_fpu.inc
 126 mainboardinit cpu/x86/mmx/enable_mmx.inc
 127 mainboardinit cpu/x86/sse/enable_sse.inc
 128 mainboardinit ./auto.inc
 129 mainboardinit cpu/x86/sse/disable_sse.inc
 130 mainboardinit cpu/x86/mmx/disable_mmx.inc
 131
 132 ##
 133 ## Include the secondary Configuration files
 134 ##
 135 if CONFIG_CHIP_NAME
 136         config chip.h
 137 end
 138
 139
 140 # sample config for tyan/s2891
 141 chip northbridge/amd/amdk8/root_complex
 142         device apic_cluster 0 on
 143                 chip cpu/amd/socket_940
 144                         device apic 0 on end
 145                 end
 146         end
 147
 148         device pci_domain 0 on
 149                 chip northbridge/amd/amdk8 #mc0
 150                         device pci 18.0 on #  northbridge
 151                                 #  devices on link 0, link 0 == LDT 0
 152                                 chip southbridge/nvidia/ck804
 153                                         device pci 0.0 on end   # HT
 154                                         device pci 1.0 on # LPC
 155                                                 chip superio/winbond/w83627hf
 156                                                         device pnp 2e.0 on #  Floppy
 157                                                                 io 0x60 = 0x3f0
 158                                                                 irq 0x70 = 6
 159                                                                 drq 0x74 = 2
 160                                                         end
 161                                                         device pnp 2e.1 off #  Parallel Port
 162                                                                 io 0x60 = 0x378
 163                                                                 irq 0x70 = 7
 164                                                         end
 165                                                         device pnp 2e.2 on #  Com1
 166                                                                 io 0x60 = 0x3f8
 167                                                                 irq 0x70 = 4
 168                                                         end
 169                                                         device pnp 2e.3 on #  Com2
 170                                                                 io 0x60 = 0x2f8
 171                                                                 irq 0x70 = 3
 172                                                         end
 173                                                         device pnp 2e.5 on #  Keyboard
 174                                                                 io 0x60 = 0x60
 175                                                                 io 0x62 = 0x64
 176                                                                 irq 0x70 = 1
 177                                                                 irq 0x72 = 12
 178                                                         end
 179                                                         device pnp 2e.6 off #  CIR
 180                                                                 io 0x60 = 0x100
 181                                                         end
 182                                                         device pnp 2e.7 off #  GAME_MIDI_GIPO1
 183                                                                 io 0x60 = 0x220
 184                                                                 io 0x62 = 0x300
 185                                                                 irq 0x70 = 9
 186                                                         end
 187                                                         device pnp 2e.8 off end #  GPIO2
 188                                                         device pnp 2e.9 off end #  GPIO3
 189                                                         device pnp 2e.a off end #  ACPI
 190                                                         device pnp 2e.b on #  HW Monitor
 191                                                                 io 0x60 = 0x290
 192                                                                 irq 0x70 = 5
 193                                                         end
 194                                                 end
 195                                         end
 196                                         device pci 1.1 on # SM 0
 197                                                 chip drivers/generic/generic #dimm 0-0-0
 198                                                         device i2c 50 on end
 199                                                 end
 200                                                 chip drivers/generic/generic #dimm 0-0-1
 201                                                         device i2c 51 on end
 202                                                 end
 203                                                 chip drivers/generic/generic #dimm 0-1-0
 204                                                         device i2c 52 on end
 205                                                 end
 206                                                 chip drivers/generic/generic #dimm 0-1-1
 207                                                         device i2c 53 on end
 208                                                 end
 209                                                 chip drivers/generic/generic #dimm 1-0-0
 210                                                         device i2c 54 on end
 211                                                 end
 212                                                 chip drivers/generic/generic #dimm 1-0-1
 213                                                         device i2c 55 on end
 214                                                 end
 215                                                 chip drivers/generic/generic #dimm 1-1-0
 216                                                         device i2c 56 on end
 217                                                 end
 218                                                 chip drivers/generic/generic #dimm 1-1-1
 219                                                         device i2c 57 on end
 220                                                 end
 221                                         end # SM
 222                                         device pci 1.1 on # SM 1
 223                                                 chip drivers/i2c/adm1027 # ADT7463A CPU0 temp, SYS FAN 2/3/4
 224                                                         device i2c 2d on end
 225                                                 end
 226                                                 chip drivers/i2c/adm1027 # ADT7463A CPU1 temp, CPU0/1 FAN , SYS FAN 1/5
 227                                                         device i2c 2e on end
 228                                                 end
 229                                                 chip drivers/generic/generic # Winbond HWM 0x54 CPU0/1 VRM temp, SYSFAN 6/7, SB FAN
 230                                                         device i2c 2a on end
 231                                                 end
 232                                                 chip drivers/generic/generic # Winbond HWM 0x92
 233                                                         device i2c 49 on end
 234                                                 end
 235                                                 chip drivers/generic/generic # Winbond HWM 0x94
 236                                                         device i2c 4a on end
 237                                                 end
 238                                         end #SM
 239                                         device pci 2.0 on end # USB 1.1
 240                                         device pci 2.1 on end # USB 2
 241                                         device pci 4.0 off end # ACI
 242                                         device pci 4.1 off end # MCI
 243                                         device pci 6.0 on end # IDE
 244                                         device pci 7.0 on end # SATA 1
 245                                         device pci 8.0 on end # SATA 0
 246                                         device pci 9.0 on  # PCI
 247                                         #       chip drivers/ati/ragexl
 248                                                 chip drivers/pci/onboard
 249                                                         device pci 7.0 on end
 250                                                         register "rom_address" = "0xfff80000"
 251                                                 end
 252                                         end
 253                                         device pci a.0 off end # NIC
 254                                         device pci b.0 off end # PCI E 3
 255                                         device pci c.0 off end # PCI E 2
 256                                         device pci d.0 on end # PCI E 1
 257                                         device pci e.0 on end # PCI E 0
 258                                         register "ide0_enable" = "1"
 259                                         register "ide1_enable" = "1"
 260                                         register "sata0_enable" = "1"
 261                                         register "sata1_enable" = "1"
 262                                 end
 263                         end #  device pci 18.0
 264                         device pci 18.0 on end # Link 1
 265                         device pci 18.0 on
 266                                 #  devices on link 2, link 2 == LDT 2
 267                                 chip southbridge/amd/amd8131
 268                                         # the on/off keyword is mandatory
 269                                         device pci 0.0 on end
 270                                         device pci 0.1 on end
 271                                         device pci 1.0 on
 272                                                 chip drivers/pci/onboard
 273                                                         device pci 9.0 on end
 274                                                         device pci 9.1 on end
 275                                                 end
 276                                         end
 277                                         device pci 1.1 on end
 278                                 end
 279                         end # device pci 18.0
 280                         device pci 18.1 on end
 281                         device pci 18.2 on end
 282                         device pci 18.3 on end
 283                 end #mc0
 284
 285         end # pci_domain
 286
 287 #        chip drivers/generic/debug
 288 #                device pnp 0.0 off end
 289 #                device pnp 0.1 off end
 290 #                device pnp 0.2 off end
 291 #                device pnp 0.3 off end
 292 #                device pnp 0.4 off end
 293 #               device pnp 0.5 on end
 294 #        end
 295 end # root_complex