3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
8 uses HARD_RESET_FUNCTION
10 uses HAVE_OPTION_TABLE
19 uses ROM_SECTION_OFFSET
20 uses CONFIG_ROM_STREAM
21 uses CONFIG_ROM_STREAM_START
29 uses LB_CKS_RANGE_START
32 uses MAINBOARD_PART_NUMBER
35 uses LINUXBIOS_EXTRA_VERSION
42 uses DEFAULT_CONSOLE_LOGLEVEL
43 uses MAXIMUM_CONSOLE_LOGLEVEL
44 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
45 uses CONFIG_CONSOLE_SERIAL8250
53 ## ROM_SIZE is the size of boot ROM that this board will use.
55 default ROM_SIZE=524288
58 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
60 default FALLBACK_SIZE=131072
63 ## Build code for the fallback boot
65 default HAVE_FALLBACK_BOOT=1
68 ## Build code to reset the motherboard from linuxBIOS
70 default HAVE_HARD_RESET=1
73 ## Funky hard reset implementation
75 default HARD_RESET_BUS=3
76 default HARD_RESET_DEVICE=4
77 default HARD_RESET_FUNCTION=0
80 ## Build code to export a programmable irq routing table
82 default HAVE_PIRQ_TABLE=1
83 default IRQ_SLOT_COUNT=9
86 ## Build code to export an x86 MP table
87 ## Useful for specifying IRQ routing values
89 default HAVE_MP_TABLE=1
92 ## Build code to export a CMOS option table
94 default HAVE_OPTION_TABLE=1
97 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
99 default LB_CKS_RANGE_START=49
100 default LB_CKS_RANGE_END=122
101 default LB_CKS_LOC=123
104 ## Build code for SMP support
105 ## Only worry about 2 micro processors
108 default CONFIG_MAX_CPUS=2
111 ## Build code to setup a generic IOAPIC
113 default CONFIG_IOAPIC=1
116 ## Clean up the motherboard id strings
118 default MAINBOARD_PART_NUMBER="Tyan"
119 default MAINBOARD_VENDOR="s2885"
122 ### LinuxBIOS layout values
125 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
126 default ROM_IMAGE_SIZE = 65536
129 ## Use a small 8K stack
131 default STACK_SIZE=0x2000
134 ## Use a small 16K heap
136 default HEAP_SIZE=0x4000
139 ## Only use the option table in a normal image
141 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
144 ## LinuxBIOS C code runs at this location in RAM
146 default _RAMBASE=0x00004000
149 ## Load the payload from the ROM
151 default CONFIG_ROM_STREAM = 1
154 ### Defaults of options that you may want to override in the target config file
158 ## The default compiler
164 ## The Serial Console
167 # To Enable the Serial Console
168 default CONFIG_CONSOLE_SERIAL8250=1
170 ## Select the serial console baud rate
171 default TTYS0_BAUD=115200
172 #default TTYS0_BAUD=57600
173 #default TTYS0_BAUD=38400
174 #default TTYS0_BAUD=19200
175 #default TTYS0_BAUD=9600
176 #default TTYS0_BAUD=4800
177 #default TTYS0_BAUD=2400
178 #default TTYS0_BAUD=1200
180 # Select the serial console base port
181 default TTYS0_BASE=0x3f8
183 # Select the serial protocol
184 # This defaults to 8 data bits, 1 stop bit, and no parity
185 default TTYS0_LCS=0x3
188 ### Select the linuxBIOS loglevel
190 ## EMERG 1 system is unusable
191 ## ALERT 2 action must be taken immediately
192 ## CRIT 3 critical conditions
193 ## ERR 4 error conditions
194 ## WARNING 5 warning conditions
195 ## NOTICE 6 normal but significant condition
196 ## INFO 7 informational
197 ## DEBUG 8 debug-level messages
198 ## SPEW 9 Way too many details
200 ## Request this level of debugging output
201 default DEFAULT_CONSOLE_LOGLEVEL=8
202 ## At a maximum only compile in this level of debugging
203 default MAXIMUM_CONSOLE_LOGLEVEL=8
206 ## Select power on after power fail setting
207 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"