e708936f46fec4a39c7980b36c491de99d012dac
[coreboot.git] / src / mainboard / tyan / s2882 / Config.lb
1 ##
2 ## Compute the location and size of where this firmware image
3 ## (linuxBIOS plus bootloader) will live in the boot rom chip.
4 ##
5 if USE_FALLBACK_IMAGE
6         default ROM_SECTION_SIZE   = FALLBACK_SIZE
7         default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
8 else
9         default ROM_SECTION_SIZE   = ( ROM_SIZE - FALLBACK_SIZE )
10         default ROM_SECTION_OFFSET = 0
11 end
12
13 ##
14 ## Compute the start location and size size of
15 ## The linuxBIOS bootloader.
16 ##
17 default PAYLOAD_SIZE            = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
18 default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
19
20 ##
21 ## Compute where this copy of linuxBIOS will start in the boot rom
22 ##
23 default _ROMBASE      = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )
24
25 ##
26 ## Compute a range of ROM that can cached to speed up linuxBIOS,
27 ## execution speed.
28 ##
29 ## XIP_ROM_SIZE must be a power of 2.
30 ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
31 ##
32 default XIP_ROM_SIZE=65536
33 default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
34
35 arch i386 end 
36
37 ##
38 ## Build the objects we have code for in this directory.
39 ##
40
41 driver mainboard.o
42 if HAVE_MP_TABLE object mptable.o end
43 if HAVE_PIRQ_TABLE object irq_tables.o end
44 #object reset.o
45
46 ##
47 ## Romcc output
48 ##
49 makerule ./failover.E
50         depends "$(MAINBOARD)/failover.c ./romcc"
51         action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
52 end
53
54 makerule ./failover.inc
55         depends "$(MAINBOARD)/failover.c ./romcc"
56         action "./romcc    -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
57 end
58
59 makerule ./auto.E
60         depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
61         action  "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
62 end
63 makerule ./auto.inc
64         depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
65         action  "./romcc    -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
66 end
67
68 ##
69 ## Build our 16 bit and 32 bit linuxBIOS entry code
70 ##
71 mainboardinit cpu/x86/16bit/entry16.inc
72 mainboardinit cpu/x86/32bit/entry32.inc
73 ldscript /cpu/x86/16bit/entry16.lds
74 ldscript /cpu/x86/32bit/entry32.lds
75
76 ##
77 ## Build our reset vector (This is where linuxBIOS is entered)
78 ##
79 if USE_FALLBACK_IMAGE 
80         mainboardinit cpu/x86/16bit/reset16.inc 
81         ldscript /cpu/x86/16bit/reset16.lds 
82 else
83         mainboardinit cpu/x86/32bit/reset32.inc 
84         ldscript /cpu/x86/32bit/reset32.lds 
85 end
86
87 ### Should this be in the northbridge code?
88 mainboardinit arch/i386/lib/cpu_reset.inc
89
90 ##
91 ## Include an id string (For safe flashing)
92 ##
93 mainboardinit arch/i386/lib/id.inc
94 ldscript /arch/i386/lib/id.lds
95
96 ###
97 ### This is the early phase of linuxBIOS startup 
98 ### Things are delicate and we test to see if we should
99 ### failover to another image.
100 ###
101 if USE_FALLBACK_IMAGE
102         ldscript /arch/i386/lib/failover.lds 
103         mainboardinit ./failover.inc
104 end
105
106 ###
107 ### O.k. We aren't just an intermediary anymore!
108 ###
109
110 ##
111 ## Setup RAM
112 ##
113 mainboardinit cpu/x86/fpu/enable_fpu.inc
114 mainboardinit cpu/x86/mmx/enable_mmx.inc
115 mainboardinit cpu/x86/sse/enable_sse.inc
116 mainboardinit ./auto.inc
117 mainboardinit cpu/x86/sse/disable_sse.inc
118 mainboardinit cpu/x86/mmx/disable_mmx.inc
119
120 ##
121 ## Include the secondary Configuration files 
122 ##
123 if CONFIG_CHIP_NAME
124         config chip.h
125 end
126
127 # sample config for tyan/s2882
128 chip northbridge/amd/amdk8/root_complex
129         device apic_cluster 0 on
130                 chip cpu/amd/socket_940
131                         device apic 0 on end
132                 end
133         end
134
135         device pci_domain 0 on
136                 chip northbridge/amd/amdk8
137                         device pci 18.0 on #  northbridge 
138                                 #  devices on link 0, link 0 == LDT 0
139                                 chip southbridge/amd/amd8131
140                                         # the on/off keyword is mandatory
141                                         device pci 0.0 on
142                                                 chip drivers/pci/onboard 
143                                                         device pci 6.0 on end # adaptec
144                                                         device pci 6.1 on end
145                                                 end 
146                                                 chip drivers/pci/onboard
147                                                         device pci 9.0 on end # broadcom 5704
148                                                         device pci 9.1 on end
149                                                 end
150                                         end
151                                         device pci 0.1 on end
152                                         device pci 1.0 on end
153                                         device pci 1.1 on end
154                                 end
155                                 chip southbridge/amd/amd8111
156                                         # this "device pci 0.0" is the parent the next one
157                                         # PCI bridge
158                                         device pci 0.0 on
159                                                 device pci 0.0 on end
160                                                 device pci 0.1 on end
161                                                 device pci 0.2 off end
162                                                 device pci 1.0 off end
163                                                 chip drivers/pci/onboard  
164                                                         device pci 5.0 on end
165                                                 end
166                                         #       chip drivers/ati/ragexl
167                                                 chip drivers/pci/onboard
168                                                         device pci 6.0 on end
169                                                         register "rom_address" = "0xfff80000"
170                                                 end
171                                                 chip drivers/pci/onboard 
172                                                         device pci 8.0 on end #intel 10/100
173                                                 end
174                                         end
175                                         device pci 1.0 on
176                                                 chip superio/winbond/w83627hf
177                                                         device pnp 2e.0 on #  Floppy
178                                                                 io 0x60 = 0x3f0
179                                                                 irq 0x70 = 6
180                                                                 drq 0x74 = 2
181                                                         end
182                                                         device pnp 2e.1 off #  Parallel Port
183                                                                 io 0x60 = 0x378
184                                                                 irq 0x70 = 7
185                                                         end
186                                                         device pnp 2e.2 on #  Com1
187                                                                 io 0x60 = 0x3f8
188                                                                 irq 0x70 = 4
189                                                         end
190                                                         device pnp 2e.3 off #  Com2
191                                                                 io 0x60 = 0x2f8
192                                                                 irq 0x70 = 3
193                                                         end
194                                                         device pnp 2e.5 on #  Keyboard
195                                                                 io 0x60 = 0x60
196                                                                 io 0x62 = 0x64
197                                                                 irq 0x70 = 1
198                                                                 irq 0x72 = 12
199                                                         end
200                                                         device pnp 2e.6 off #  CIR
201                                                                 io 0x60 = 0x100
202                                                         end
203                                                         device pnp 2e.7 off #  GAME_MIDI_GIPO1
204                                                                 io 0x60 = 0x220
205                                                                 io 0x62 = 0x300
206                                                                 irq 0x70 = 9
207                                                         end  
208                                                         device pnp 2e.8 off end #  GPIO2
209                                                         device pnp 2e.9 off end #  GPIO3
210                                                         device pnp 2e.a off end #  ACPI
211                                                         device pnp 2e.b on #  HW Monitor
212                                                                 io 0x60 = 0x290
213                                                                 irq 0x70 = 5
214                                                         end
215                                                 end
216                                         end
217                                         device pci 1.1 on end
218                                         device pci 1.2 on end
219                                         device pci 1.3 on 
220 #                                                chip drivers/generic/generic #dimm 0-0-0
221 #                                                        device i2c 50 on end
222 #                                                end
223 #                                                chip drivers/generic/generic #dimm 0-0-1
224 #                                                        device i2c 51 on end
225 #                                                end     
226 #                                                chip drivers/generic/generic #dimm 0-1-0
227 #                                                        device i2c 52 on end
228 #                                                end
229 #                                                chip drivers/generic/generic #dimm 0-1-1
230 #                                                        device i2c 53 on end
231 #                                                end
232 #                                                chip drivers/generic/generic #dimm 1-0-0
233 #                                                        device i2c 54 on end
234 #                                                end
235 #                                                chip drivers/generic/generic #dimm 1-0-1
236 #                                                        device i2c 55 on end
237 #                                                end
238 #                                                chip drivers/generic/generic #dimm 1-1-0
239 #                                                        device i2c 56 on end
240 #                                                end
241 #                                                chip drivers/generic/generic #dimm 1-1-1
242 #                                                        device i2c 57 on end
243 #                                                end
244                                         end # acpi
245                                         device pci 1.5 off end
246                                         device pci 1.6 off end
247                                         register "ide0_enable" = "1"
248                                         register "ide1_enable" = "1"
249                                 end
250                         end #  device pci 18.0 
251                         
252                         device pci 18.0 on end
253                         device pci 18.0 on end
254                         
255                         device pci 18.1 on end
256                         device pci 18.2 on end
257                         device pci 18.3 on end
258                 end # NB
259         end #pci_domain
260 end
261