3 uses USE_FALLBACK_IMAGE
11 ### Set all of the defaults for an x86 architecture
16 ### Build the objects we have code for in this directory.
20 register "fixup_scsi" = "1"
21 register "fixup_vga" = "1"
28 object static_devices.o
29 if HAVE_MP_TABLE object mptable.o end
30 if HAVE_PIRQ_TABLE object irq_tables.o end
36 ### Build our 16 bit and 32 bit linuxBIOS entry code
38 mainboardinit cpu/i386/entry16.inc
39 mainboardinit cpu/i386/entry32.inc
40 ldscript /cpu/i386/entry16.lds
41 ldscript /cpu/i386/entry32.lds
44 ### Build our reset vector (This is where linuxBIOS is entered)
47 mainboardinit cpu/i386/reset16.inc
48 ldscript /cpu/i386/reset16.lds
50 # print "NO FALLBACK USED!"
54 mainboardinit cpu/i386/reset32.inc
55 ldscript /cpu/i386/reset32.lds
58 #### Should this be in the northbridge code?
59 mainboardinit arch/i386/lib/cpu_reset.inc
62 ### Include an id string (For safe flashing)
64 mainboardinit arch/i386/lib/id.inc
65 ldscript /arch/i386/lib/id.lds
68 #### This is the early phase of linuxBIOS startup
69 #### Things are delicate and we test to see if we should
70 #### failover to another image.
72 #option MAX_REBOOT_CNT=2
74 ldscript /arch/i386/lib/failover.lds
80 mainboardinit cpu/k8/earlymtrr.inc
82 ### Only the bootstrap cpu makes it here.
83 ### Failover if we need to
87 mainboardinit ./failover.inc
88 # mainboardinit southbridge/amd/amd8111/cmos_boot_failover.inc
94 ### Setup the serial port
96 #mainboardinit superiowinbond/w83627hf/setup_serial.inc
97 mainboardinit pc80/serial.inc
98 mainboardinit arch/i386/lib/console.inc
101 #### O.k. We aren't just an intermediary anymore!
105 ### When debugging disable the watchdog timer
107 ##option MAXIMUM_CONSOLE_LOGLEVEL=7
108 #default MAXIMUM_CONSOLE_LOGLEVEL=7
109 #option DISABLE_WATCHDOG= (MAXIMUM_CONSOLE_LOGLEVEL >= 8)
111 # mainboardinit southbridgeamd/amd8111/disable_watchdog.inc
114 #if USE_FALLBACK_IMAGE mainboardinit arch/i386/lib/noop_failover.inc end
119 #makerule ./failover.E dep "$(MAINBOARD)/failover.c" act "$(CPP) -I$(TOP)/src $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failever.E"
120 #makerule ./failover.inc dep "./romcc ./failover.E" act "./romcc -O ./failover.E > failover.inc"
121 #mainboardinit .failover.inc
123 makerule ./failover.E
124 depends "$(MAINBOARD)/failover.c"
125 action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E"
128 makerule ./failover.inc
129 depends "./romcc ./failover.E"
130 action "./romcc -O -o failover.inc --label-prefix=failover ./failover.E"end
133 depends "$(MAINBOARD)/auto.c"
134 action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E"
137 depends "./romcc ./auto.E"
138 action "./romcc -O -mcpu=k8 -o auto.inc --label-prefix=auto ./auto.E"
139 # action "./romcc -mcpu=k8 -O ./auto.E > auto.inc"
141 mainboardinit cpu/k8/enable_mmx_sse.inc
142 mainboardinit ./auto.inc
143 mainboardinit cpu/k8/disable_mmx_sse.inc
148 #mainboardinit ram/ramtest.inc
149 #mainboardinit southbridge/amd/amd8111/smbus.inc
150 #mainboardinit sdram/generic_dump_spd.inc
153 ### Include the secondary Configuration files
155 northbridge amd/amdk8
157 southbridge amd/amd8111 "amd8111"
159 southbridge amd/amd8131 "amd8131"
161 #mainboardinit archi386/smp/secondary.inc
163 # register "com1" = "{1}"
164 # register "lpt" = "{1}"
167 ##dir /src/superio/winbond/w83627hf
171 register "up" = "{.chip = &amd8131, .ht_width=8, .ht_speed=200}"