1 include /config/nofailovercalculation.lb
6 ## Build the objects we have code for in this directory.
13 if HAVE_MP_TABLE object mptable.o end
14 if HAVE_PIRQ_TABLE object irq_tables.o end
19 depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
20 action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c $(MAINBOARD)/cache_as_ram_auto.c -o $@"
26 depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
27 action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c -S $(MAINBOARD)/cache_as_ram_auto.c -o $@"
28 action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
29 action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
34 ## Build our 16 bit and 32 bit coreboot entry code
37 mainboardinit cpu/x86/16bit/entry16.inc
38 ldscript /cpu/x86/16bit/entry16.lds
41 mainboardinit cpu/x86/32bit/entry32.inc
44 ldscript /cpu/x86/32bit/entry32.lds
48 ldscript /cpu/amd/car/cache_as_ram.lds
52 ## Build our reset vector (This is where coreboot is entered)
55 mainboardinit cpu/x86/16bit/reset16.inc
56 ldscript /cpu/x86/16bit/reset16.lds
58 mainboardinit cpu/x86/32bit/reset32.inc
59 ldscript /cpu/x86/32bit/reset32.lds
63 ## Include an id string (For safe flashing)
65 mainboardinit arch/i386/lib/id.inc
66 ldscript /arch/i386/lib/id.lds
71 mainboardinit cpu/amd/car/cache_as_ram.inc
74 ### This is the early phase of coreboot startup
75 ### Things are delicate and we test to see if we should
76 ### failover to another image.
79 ldscript /arch/i386/lib/failover.lds
83 ### O.k. We aren't just an intermediary anymore!
92 mainboardinit ./auto.inc
96 ## Include the secondary Configuration files
100 # sample config for tyan/s2882
101 chip northbridge/amd/amdk8/root_complex
102 device apic_cluster 0 on
103 chip cpu/amd/socket_940
108 device pci_domain 0 on
109 chip northbridge/amd/amdk8
110 device pci 18.0 on # northbridge
111 # devices on link 0, link 0 == LDT 0
112 chip southbridge/amd/amd8131
113 # the on/off keyword is mandatory
115 chip drivers/pci/onboard
116 device pci 6.0 on end # adaptec
117 device pci 6.1 on end
119 chip drivers/pci/onboard
120 device pci 9.0 on end # broadcom 5704
121 device pci 9.1 on end
124 device pci 0.1 on end
125 device pci 1.0 on end
126 device pci 1.1 on end
128 chip southbridge/amd/amd8111
129 # this "device pci 0.0" is the parent the next one
132 device pci 0.0 on end
133 device pci 0.1 on end
134 device pci 0.2 off end
135 device pci 1.0 off end
136 chip drivers/pci/onboard
137 device pci 5.0 on end
139 # chip drivers/ati/ragexl
140 chip drivers/pci/onboard
141 device pci 6.0 on end
142 register "rom_address" = "0xfff00000"
144 chip drivers/pci/onboard
145 device pci 8.0 on end #intel 10/100
149 chip superio/winbond/w83627hf
150 device pnp 2e.0 on # Floppy
155 device pnp 2e.1 off # Parallel Port
159 device pnp 2e.2 on # Com1
163 device pnp 2e.3 off # Com2
167 device pnp 2e.5 on # Keyboard
173 device pnp 2e.6 off # CIR
176 device pnp 2e.7 off # GAME_MIDI_GIPO1
181 device pnp 2e.8 off end # GPIO2
182 device pnp 2e.9 off end # GPIO3
183 device pnp 2e.a off end # ACPI
184 device pnp 2e.b on # HW Monitor
190 device pci 1.1 on end
191 device pci 1.2 on end
192 device pci 1.3 on end
194 # chip drivers/generic/generic #dimm 0-0-0
195 # device i2c 50 on end
197 # chip drivers/generic/generic #dimm 0-0-1
198 # device i2c 51 on end
200 # chip drivers/generic/generic #dimm 0-1-0
201 # device i2c 52 on end
203 # chip drivers/generic/generic #dimm 0-1-1
204 # device i2c 53 on end
206 # chip drivers/generic/generic #dimm 1-0-0
207 # device i2c 54 on end
209 # chip drivers/generic/generic #dimm 1-0-1
210 # device i2c 55 on end
212 # chip drivers/generic/generic #dimm 1-1-0
213 # device i2c 56 on end
215 # chip drivers/generic/generic #dimm 1-1-1
216 # device i2c 57 on end
219 device pci 1.5 off end
220 device pci 1.6 off end
221 register "ide0_enable" = "1"
222 register "ide1_enable" = "1"
224 end # device pci 18.0
226 device pci 18.0 on end
227 device pci 18.0 on end
229 device pci 18.1 on end
230 device pci 18.2 on end
231 device pci 18.3 on end