Next step. Kill auto.c and failover.c and clean up Config.lb for
[coreboot.git] / src / mainboard / tyan / s2881 / Config.lb
1 ##
2 ## Compute the location and size of where this firmware image
3 ## (coreboot plus bootloader) will live in the boot rom chip.
4 ##
5 if USE_FALLBACK_IMAGE
6         default ROM_SECTION_SIZE   = FALLBACK_SIZE
7         default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
8 else
9         default ROM_SECTION_SIZE   = ( ROM_SIZE - FALLBACK_SIZE )
10         default ROM_SECTION_OFFSET = 0
11 end
12
13 ##
14 ## Compute the start location and size size of
15 ## The coreboot bootloader.
16 ##
17 default PAYLOAD_SIZE            = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
18 default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
19
20 ##
21 ## Compute where this copy of coreboot will start in the boot rom
22 ##
23 default _ROMBASE      = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
24
25 ##
26 ## Compute a range of ROM that can cached to speed up coreboot,
27 ## execution speed.
28 ##
29 ## XIP_ROM_SIZE must be a power of 2.
30 ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
31 ##
32 default XIP_ROM_SIZE=65536
33 default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
34
35 arch i386 end 
36
37 ##
38 ## Build the objects we have code for in this directory.
39 ##
40
41 driver mainboard.o
42
43 #dir /drivers/si/3114
44 object get_bus_conf.o
45 if HAVE_MP_TABLE object mptable.o end
46 if HAVE_PIRQ_TABLE object irq_tables.o end
47
48 if CONFIG_USE_INIT
49
50 makerule ./auto.o
51         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
52         action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o auto.o" 
53 end
54
55 else    
56                 
57 makerule ./auto.inc
58         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
59         action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall $(DEBUG_CFLAGS) -c -S -o $@"         
60         action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
61         action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
62 end
63
64 end
65 ##
66 ## Build our 16 bit and 32 bit coreboot entry code
67 ##
68 if USE_FALLBACK_IMAGE
69         mainboardinit cpu/x86/16bit/entry16.inc
70         ldscript /cpu/x86/16bit/entry16.lds
71 end
72
73 mainboardinit cpu/x86/32bit/entry32.inc
74
75         if CONFIG_USE_INIT
76                 ldscript /cpu/x86/32bit/entry32.lds
77         end
78
79         if CONFIG_USE_INIT
80                 ldscript      /cpu/amd/car/cache_as_ram.lds
81         end
82
83 ##
84 ## Build our reset vector (This is where coreboot is entered)
85 ##
86 if USE_FALLBACK_IMAGE 
87         mainboardinit cpu/x86/16bit/reset16.inc 
88         ldscript /cpu/x86/16bit/reset16.lds 
89 else
90         mainboardinit cpu/x86/32bit/reset32.inc 
91         ldscript /cpu/x86/32bit/reset32.lds 
92 end
93
94 ##
95 ## Include an id string (For safe flashing)
96 ##
97 mainboardinit arch/i386/lib/id.inc
98 ldscript /arch/i386/lib/id.lds
99
100 ##
101 ## Setup Cache-As-Ram
102 ##
103 mainboardinit cpu/amd/car/cache_as_ram.inc
104
105 ###
106 ### This is the early phase of coreboot startup 
107 ### Things are delicate and we test to see if we should
108 ### failover to another image.
109 ###
110 if USE_FALLBACK_IMAGE
111        ldscript /arch/i386/lib/failover.lds
112 end
113
114 ###
115 ### O.k. We aren't just an intermediary anymore!
116 ###
117
118 ##
119 ## Setup RAM
120 ##
121 if CONFIG_USE_INIT
122 initobject auto.o
123 else
124 mainboardinit ./auto.inc
125 end
126
127 ##
128 ## Include the secondary Configuration files 
129 ##
130 config chip.h
131
132 # sample config for tyan/s2881
133 chip northbridge/amd/amdk8/root_complex
134         device apic_cluster 0 on
135                 chip cpu/amd/socket_940
136                         device apic 0 on end
137                 end
138         end
139         device pci_domain 0 on
140                 chip northbridge/amd/amdk8
141                         device pci 18.0 on end # LDT0
142                         device pci 18.0 on end # LDT1
143                         device pci 18.0 on #  northbridge 
144                                 #  devices on link 2, link 2 == LDT 2
145                                 chip southbridge/amd/amd8131
146                                         # the on/off keyword is mandatory
147                                         device pci 0.0 on 
148                                                 chip drivers/pci/onboard
149                                                         device pci 9.0 on end # Broadcom 5704
150                                                         device pci 9.1 on end
151                                                 end
152                                                 chip drivers/pci/onboard
153                                                         device pci a.0 on end # Adaptic
154                                                         device pci a.1 on end
155                                                 end
156                                         end
157                                         device pci 0.1 on end
158                                         device pci 1.0 on end
159                                         device pci 1.1 on end
160                                 end
161                                 chip southbridge/amd/amd8111
162                                         # this "device pci 0.0" is the parent the next one
163                                         # PCI bridge
164                                         device pci 0.0 on
165                                                 device pci 0.0 on end
166                                                 device pci 0.1 on end
167                                                 device pci 0.2 off end
168                                                 device pci 1.0 off end
169                                                 chip drivers/pci/onboard
170                                                         device pci 5.0 on end # SiI
171                                                 end
172                                                 chip drivers/pci/onboard
173                                                         device pci 6.0 on end
174                                                         register "rom_address" = "0xfff80000"
175                                                 end
176                                         end
177                                         device pci 1.0 on
178                                                 chip superio/winbond/w83627hf
179                                                         device pnp 2e.0 on #  Floppy
180                                                                 io 0x60 = 0x3f0
181                                                                 irq 0x70 = 6
182                                                                 drq 0x74 = 2
183                                                         end
184                                                         device pnp 2e.1 off #  Parallel Port
185                                                                 io 0x60 = 0x378
186                                                                 irq 0x70 = 7
187                                                         end
188                                                         device pnp 2e.2 on #  Com1
189                                                                 io 0x60 = 0x3f8
190                                                                 irq 0x70 = 4
191                                                         end
192                                                         device pnp 2e.3 off #  Com2
193                                                                 io 0x60 = 0x2f8
194                                                                 irq 0x70 = 3
195                                                         end
196                                                         device pnp 2e.5 on #  Keyboard
197                                                                 io 0x60 = 0x60
198                                                                 io 0x62 = 0x64
199                                                                 irq 0x70 = 1
200                                                                 irq 0x72 = 12
201                                                         end
202                                                         device pnp 2e.6 off #  CIR
203                                                                 io 0x60 = 0x100
204                                                         end
205                                                         device pnp 2e.7 off #  GAME_MIDI_GIPO1
206                                                                 io 0x60 = 0x220
207                                                                 io 0x62 = 0x300
208                                                                 irq 0x70 = 9
209                                                         end  
210                                                         device pnp 2e.8 off end #  GPIO2
211                                                         device pnp 2e.9 off end #  GPIO3
212                                                         device pnp 2e.a off end #  ACPI
213                                                         device pnp 2e.b on #  HW Monitor
214                                                                 io 0x60 = 0x290
215                                                                 irq 0x70 = 5
216                                                         end
217                                                 end
218                                         end
219                                         device pci 1.1 on end
220                                         device pci 1.2 on end
221                                         device pci 1.3 on 
222                                                 chip drivers/generic/generic #dimm 0-0-0
223                                                         device i2c 50 on end
224                                                 end
225                                                 chip drivers/generic/generic #dimm 0-0-1
226                                                         device i2c 51 on end
227                                                 end     
228                                                 chip drivers/generic/generic #dimm 0-1-0
229                                                         device i2c 52 on end
230                                                 end
231                                                 chip drivers/generic/generic #dimm 0-1-1
232                                                         device i2c 53 on end
233                                                 end
234                                                 chip drivers/generic/generic #dimm 1-0-0
235                                                         device i2c 54 on end
236                                                 end
237                                                 chip drivers/generic/generic #dimm 1-0-1
238                                                         device i2c 55 on end
239                                                 end
240                                                 chip drivers/generic/generic #dimm 1-1-0
241                                                         device i2c 56 on end
242                                                 end
243                                                 chip drivers/generic/generic #dimm 1-1-1
244                                                         device i2c 57 on end
245                                                 end
246                                                 chip drivers/i2c/adm1027 # ADT7463A CPU0/1 temp, CPU1 vid, SYS FAN 1/2/3
247                                                         device i2c 2d on end
248                                                 end
249                                                 chip drivers/generic/generic # Winbond HWM 0x54 CPU0/1 VRM temp, SYSFAN 4,CPU0 vid, CPU0/1 FAN
250                                                         device i2c 2a on end
251                                                 end
252                                                 chip drivers/generic/generic # Winbond HWM 0x92
253                                                         device i2c 49 on end
254                                                 end
255                                                 chip drivers/generic/generic # Winbond HWM 0x94
256                                                         device i2c 4a on end
257                                                 end
258                                         end # acpi
259                                         device pci 1.5 off end
260                                         device pci 1.6 off end
261                                         register "ide0_enable" = "1"
262                                         register "ide1_enable" = "1"
263                                 end
264                         end #  device pci 18.0 
265                         
266                         device pci 18.1 on end
267                         device pci 18.2 on end
268                         device pci 18.3 on end
269                 end
270         end 
271 end
272