Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-34
[coreboot.git] / src / mainboard / tyan / s2881 / Config.lb
1 ##
2 ## Compute the location and size of where this firmware image
3 ## (linuxBIOS plus bootloader) will live in the boot rom chip.
4 ##
5 if USE_FALLBACK_IMAGE
6         default ROM_SECTION_SIZE   = FALLBACK_SIZE
7         default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
8 else
9         default ROM_SECTION_SIZE   = ( ROM_SIZE - FALLBACK_SIZE )
10         default ROM_SECTION_OFFSET = 0
11 end
12
13 ##
14 ## Compute the start location and size size of
15 ## The linuxBIOS bootloader.
16 ##
17 default PAYLOAD_SIZE            = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
18 default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
19
20 ##
21 ## Compute where this copy of linuxBIOS will start in the boot rom
22 ##
23 default _ROMBASE      = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )
24
25 ##
26 ## Compute a range of ROM that can cached to speed up linuxBIOS,
27 ## execution speed.
28 ##
29 ## XIP_ROM_SIZE must be a power of 2.
30 ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
31 ##
32 default XIP_ROM_SIZE=65536
33 default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
34
35 arch i386 end 
36
37 ##
38 ## Build the objects we have code for in this directory.
39 ##
40
41 driver mainboard.o
42 if HAVE_MP_TABLE object mptable.o end
43 if HAVE_PIRQ_TABLE object irq_tables.o end
44 #object reset.o
45
46
47 ##
48 ## Romcc output
49 ##
50 makerule ./failover.E
51         depends "$(MAINBOARD)/failover.c ./romcc"
52         action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
53 end
54
55 makerule ./failover.inc
56         depends "$(MAINBOARD)/failover.c ./romcc"
57         action "./romcc    -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
58 end
59
60 makerule ./auto.E
61         depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
62         action  "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
63 end
64 makerule ./auto.inc
65         depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
66         action  "./romcc    -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
67 end
68
69 ##
70 ## Build our 16 bit and 32 bit linuxBIOS entry code
71 ##
72 mainboardinit cpu/x86/16bit/entry16.inc
73 mainboardinit cpu/x86/32bit/entry32.inc
74 ldscript /cpu/x86/16bit/entry16.lds
75 ldscript /cpu/x86/32bit/entry32.lds
76
77 ##
78 ## Build our reset vector (This is where linuxBIOS is entered)
79 ##
80 if USE_FALLBACK_IMAGE 
81         mainboardinit cpu/x86/16bit/reset16.inc 
82         ldscript /cpu/x86/16bit/reset16.lds 
83 else
84         mainboardinit cpu/x86/32bit/reset32.inc 
85         ldscript /cpu/x86/32bit/reset32.lds 
86 end
87
88 ### Should this be in the northbridge code?
89 mainboardinit arch/i386/lib/cpu_reset.inc
90
91 ##
92 ## Include an id string (For safe flashing)
93 ##
94 mainboardinit arch/i386/lib/id.inc
95 ldscript /arch/i386/lib/id.lds
96
97 ###
98 ### This is the early phase of linuxBIOS startup 
99 ### Things are delicate and we test to see if we should
100 ### failover to another image.
101 ###
102 if USE_FALLBACK_IMAGE
103         ldscript /arch/i386/lib/failover.lds 
104         mainboardinit ./failover.inc
105 end
106
107 ###
108 ### O.k. We aren't just an intermediary anymore!
109 ###
110
111 ##
112 ## Setup RAM
113 ##
114 mainboardinit cpu/x86/fpu/enable_fpu.inc
115 mainboardinit cpu/x86/mmx/enable_mmx.inc
116 mainboardinit cpu/x86/sse/enable_sse.inc
117 mainboardinit ./auto.inc
118 mainboardinit cpu/x86/sse/disable_sse.inc
119 mainboardinit cpu/x86/mmx/disable_mmx.inc
120
121 ##
122 ## Include the secondary Configuration files 
123 ##
124 if CONFIG_CHIP_NAME
125         config chip.h
126 end
127
128 # sample config for tyan/s2881
129 chip northbridge/amd/amdk8/root_complex
130         device apic_cluster 0 on
131                 chip cpu/amd/socket_940
132                         device apic 0 on end
133                 end
134         end
135         device pci_domain 0 on
136                 chip northbridge/amd/amdk8
137                         device pci 18.0 on end # LDT0
138                         device pci 18.0 on end # LDT1
139                         device pci 18.0 on #  northbridge 
140                                 #  devices on link 2, link 2 == LDT 2
141                                 chip southbridge/amd/amd8131
142                                         # the on/off keyword is mandatory
143                                         device pci 0.0 on 
144                                                 chip drivers/pci/onboard
145                                                         device pci 9.0 on end # Broadcom 5704
146                                                         device pci 9.1 on end
147                                                 end
148                                                 chip drivers/pci/onboard
149                                                         device pci a.0 on end # Adaptic
150                                                         device pci a.1 on end
151                                                 end
152                                         end
153                                         device pci 0.1 on end
154                                         device pci 1.0 on end
155                                         device pci 1.1 on end
156                                 end
157                                 chip southbridge/amd/amd8111
158                                         # this "device pci 0.0" is the parent the next one
159                                         # PCI bridge
160                                         device pci 0.0 on
161                                                 device pci 0.0 on end
162                                                 device pci 0.1 on end
163                                                 device pci 0.2 off end
164                                                 device pci 1.0 off end
165                                                 chip drivers/pci/onboard
166                                                         device pci 5.0 on end # SiI
167                                                 end
168                                                 chip drivers/pci/onboard
169                                                         device pci 6.0 on end
170                                                         register "rom_address" = "0xfff80000"
171                                                 end
172                                         end
173                                         device pci 1.0 on
174                                                 chip superio/winbond/w83627hf
175                                                         device pnp 2e.0 on #  Floppy
176                                                                 io 0x60 = 0x3f0
177                                                                 irq 0x70 = 6
178                                                                 drq 0x74 = 2
179                                                         end
180                                                         device pnp 2e.1 off #  Parallel Port
181                                                                 io 0x60 = 0x378
182                                                                 irq 0x70 = 7
183                                                         end
184                                                         device pnp 2e.2 on #  Com1
185                                                                 io 0x60 = 0x3f8
186                                                                 irq 0x70 = 4
187                                                         end
188                                                         device pnp 2e.3 off #  Com2
189                                                                 io 0x60 = 0x2f8
190                                                                 irq 0x70 = 3
191                                                         end
192                                                         device pnp 2e.5 on #  Keyboard
193                                                                 io 0x60 = 0x60
194                                                                 io 0x62 = 0x64
195                                                                 irq 0x70 = 1
196                                                                 irq 0x72 = 12
197                                                         end
198                                                         device pnp 2e.6 off #  CIR
199                                                                 io 0x60 = 0x100
200                                                         end
201                                                         device pnp 2e.7 off #  GAME_MIDI_GIPO1
202                                                                 io 0x60 = 0x220
203                                                                 io 0x62 = 0x300
204                                                                 irq 0x70 = 9
205                                                         end  
206                                                         device pnp 2e.8 off end #  GPIO2
207                                                         device pnp 2e.9 off end #  GPIO3
208                                                         device pnp 2e.a off end #  ACPI
209                                                         device pnp 2e.b on #  HW Monitor
210                                                                 io 0x60 = 0x290
211                                                                 irq 0x70 = 5
212                                                         end
213                                                 end
214                                         end
215                                         device pci 1.1 on end
216                                         device pci 1.2 on end
217                                         device pci 1.3 on 
218                                                 chip drivers/generic/generic #dimm 0-0-0
219                                                         device i2c 50 on end
220                                                 end
221                                                 chip drivers/generic/generic #dimm 0-0-1
222                                                         device i2c 51 on end
223                                                 end     
224                                                 chip drivers/generic/generic #dimm 0-1-0
225                                                         device i2c 52 on end
226                                                 end
227                                                 chip drivers/generic/generic #dimm 0-1-1
228                                                         device i2c 53 on end
229                                                 end
230                                                 chip drivers/generic/generic #dimm 1-0-0
231                                                         device i2c 54 on end
232                                                 end
233                                                 chip drivers/generic/generic #dimm 1-0-1
234                                                         device i2c 55 on end
235                                                 end
236                                                 chip drivers/generic/generic #dimm 1-1-0
237                                                         device i2c 56 on end
238                                                 end
239                                                 chip drivers/generic/generic #dimm 1-1-1
240                                                         device i2c 57 on end
241                                                 end
242                                                 chip drivers/i2c/adm1027 # ADT7463A CPU0/1 temp, CPU1 vid, SYS FAN 1/2/3
243                                                         device i2c 2d on end
244                                                 end
245                                                 chip drivers/generic/generic # Winbond HWM 0x54 CPU0/1 VRM temp, SYSFAN 4,CPU0 vid, CPU0/1 FAN
246                                                         device i2c 2a on end
247                                                 end
248                                                 chip drivers/generic/generic # Winbond HWM 0x92
249                                                         device i2c 49 on end
250                                                 end
251                                                 chip drivers/generic/generic # Winbond HWM 0x94
252                                                         device i2c 4a on end
253                                                 end
254                                         end # acpi
255                                         device pci 1.5 off end
256                                         device pci 1.6 off end
257                                         register "ide0_enable" = "1"
258                                         register "ide1_enable" = "1"
259                                 end
260                         end #  device pci 18.0 
261                         
262                         device pci 18.1 on end
263                         device pci 18.2 on end
264                         device pci 18.3 on end
265                 end
266         end 
267 end
268