3 uses USE_FALLBACK_IMAGE
4 uses LB_CKS_RANGE_START
10 uses HARD_RESET_DEVICE
11 uses HARD_RESET_FUNCTION
15 ### Set all of the defaults for an x86 architecture
20 ### Build the objects we have code for in this directory.
23 register "fixup_scsi" = "1"
24 register "fixup_vga" = "1"
27 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
29 default LB_CKS_RANGE_START=49
30 default LB_CKS_RANGE_END=122
31 default LB_CKS_LOC=123
35 #dir /drivers/lsi/53c1030
36 #dir /drivers/adaptec/7902
38 #dir /drivers/intel/82551
39 dir /drivers/ati/ragexl
41 if HAVE_MP_TABLE object mptable.o end
42 if HAVE_PIRQ_TABLE object irq_tables.o end
44 default HARD_RESET_BUS=1
45 default HARD_RESET_DEVICE=4
46 default HARD_RESET_FUNCTION=0
51 ### Build our 16 bit and 32 bit linuxBIOS entry code
53 mainboardinit cpu/i386/entry16.inc
54 mainboardinit cpu/i386/entry32.inc
55 mainboardinit cpu/i386/bist32.inc
56 ldscript /cpu/i386/entry16.lds
57 ldscript /cpu/i386/entry32.lds
60 ### Build our reset vector (This is where linuxBIOS is entered)
63 mainboardinit cpu/i386/reset16.inc
64 ldscript /cpu/i386/reset16.lds
66 mainboardinit cpu/i386/reset32.inc
67 ldscript /cpu/i386/reset32.lds
70 #### Should this be in the northbridge code?
71 mainboardinit arch/i386/lib/cpu_reset.inc
74 ### Include an id string (For safe flashing)
76 mainboardinit arch/i386/lib/id.inc
77 ldscript /arch/i386/lib/id.lds
80 #### This is the early phase of linuxBIOS startup
81 #### Things are delicate and we test to see if we should
82 #### failover to another image.
84 #option MAX_REBOOT_CNT=2
86 ldscript /arch/i386/lib/failover.lds
92 mainboardinit cpu/k8/earlymtrr.inc
94 ### Only the bootstrap cpu makes it here.
95 ### Failover if we need to
99 mainboardinit ./failover.inc
105 ### Setup the serial port
107 mainboardinit pc80/serial.inc
108 mainboardinit arch/i386/lib/console.inc
109 mainboardinit cpu/i386/bist32_fail.inc
115 makerule ./failover.E
116 depends "$(MAINBOARD)/failover.c"
117 action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E"
120 makerule ./failover.inc
121 depends "./romcc ./failover.E"
122 action "./romcc -O -o failover.inc --label-prefix=failover ./failover.E"end
125 depends "$(MAINBOARD)/auto.c option_table.h"
126 action "$(CPP) -I$(TOP)/src -I. $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E"
129 depends "./romcc ./auto.E"
130 action "./romcc -O2 -mcpu=k8 -o auto.inc --label-prefix=auto ./auto.E"
132 mainboardinit cpu/k8/enable_mmx_sse.inc
133 mainboardinit ./auto.inc
134 mainboardinit cpu/k8/disable_mmx_sse.inc
137 ### Include the secondary Configuration files
139 northbridge amd/amdk8 "mc0"
146 southbridge amd/amd8131 "amd8131" link 0
152 southbridge amd/amd8111 "amd8111" link 0
164 superio winbond/w83627hf link 1
165 pnp 2e.0 off # Floppy
169 pnp 2e.1 off # Parallel Port
178 pnp 2e.5 on # Keyboard
184 pnp 2e.7 off # GAME_MIDI_GIPO1
188 pnp 2e.b on # HW Monitor
194 northbridge amd/amdk8 "mc1"
207 register "up" = "{.chip = &amd8131, .ht_width=16, .ht_speed=600}"