1 #include <console/console.h>
2 #include <arch/smp/mpspec.h>
3 #include <device/pci.h>
7 void *smp_write_config_table(void *v, unsigned long * processor_map)
9 static const char sig[4] = "PCMP";
10 static const char oem[8] = "TYAN ";
11 static const char productid[12] = "S2850 ";
12 struct mp_config_table *mc;
14 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
15 memset(mc, 0, sizeof(*mc));
17 memcpy(mc->mpc_signature, sig, sizeof(sig));
18 mc->mpc_length = sizeof(*mc); /* initially just the header */
20 mc->mpc_checksum = 0; /* not yet computed */
21 memcpy(mc->mpc_oem, oem, sizeof(oem));
22 memcpy(mc->mpc_productid, productid, sizeof(productid));
25 mc->mpc_entry_count = 0; /* No entries yet... */
26 mc->mpc_lapic = LAPIC_ADDR;
31 smp_write_processors(mc, processor_map);
35 smp_write_bus(mc, 0, "PCI ");
36 smp_write_bus(mc, 1, "PCI ");
37 smp_write_bus(mc, 2, "PCI ");
38 smp_write_bus(mc, 3, "ISA ");
40 /*I/O APICs: APIC ID Version State Address*/
41 smp_write_ioapic(mc, 1, 0x11, 0xfec00000);
43 /*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#
45 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x3, 0x1, 0x1, 0x1);
46 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x3, 0x0, 0x1, 0x2);
47 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x3, 0x3, 0x1, 0x3);
48 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x3, 0x4, 0x1, 0x4);
49 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x3, 0x5, 0x1, 0x5);
50 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x3, 0x6, 0x1, 0x6);
51 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x3, 0x7, 0x1, 0x7);
52 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x3, 0x8, 0x1, 0x8);
53 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x3, 0xc, 0x1, 0xc);
54 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x3, 0xd, 0x1, 0xd);
55 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x3, 0xe, 0x1, 0xe);
56 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x3, 0xf, 0x1, 0xf);
59 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, (2<<2)|3, 0x1, 0x13);
60 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0x3, 0x1, 0x13);
61 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0x34, 0x1, 0x13);
62 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0x2c, 0x1, 0x12);
63 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0x38, 0x1, 0x10);
66 /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
67 smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x0, 0x0, MP_APIC_ALL, 0x0);
68 smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x0, 0x0, MP_APIC_ALL, 0x1);
69 /* There is no extension information... */
71 /* Compute the checksums */
72 mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
73 mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
74 printk_debug("Wrote the mp table end at: %p - %p\n",
75 mc, smp_next_mpe_entry(mc));
76 return smp_next_mpe_entry(mc);
79 unsigned long write_smp_table(unsigned long addr, unsigned long *processor_map)
82 v = smp_write_floating_table(addr);
83 return (unsigned long)smp_write_config_table(v, processor_map);