3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
8 uses HARD_RESET_FUNCTION
10 uses HAVE_OPTION_TABLE
19 uses ROM_SECTION_OFFSET
20 uses CONFIG_ROM_STREAM
21 uses CONFIG_ROM_STREAM_START
29 uses LB_CKS_RANGE_START
32 uses MAINBOARD_PART_NUMBER
35 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
36 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
37 uses LINUXBIOS_EXTRA_VERSION
44 uses DEFAULT_CONSOLE_LOGLEVEL
45 uses MAXIMUM_CONSOLE_LOGLEVEL
46 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
47 uses CONFIG_CONSOLE_SERIAL8250
56 ## ROM_SIZE is the size of boot ROM that this board will use.
58 default ROM_SIZE=524288
61 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
63 default FALLBACK_SIZE=131072
66 ## Build code for the fallback boot
68 default HAVE_FALLBACK_BOOT=1
71 ## Build code to reset the motherboard from linuxBIOS
73 default HAVE_HARD_RESET=1
76 ## Funky hard reset implementation
78 default HARD_RESET_BUS=1
79 default HARD_RESET_DEVICE=2
80 default HARD_RESET_FUNCTION=0
83 ## Build code to export a programmable irq routing table
85 default HAVE_PIRQ_TABLE=1
86 default IRQ_SLOT_COUNT=12
89 ## Build code to export an x86 MP table
90 ## Useful for specifying IRQ routing values
92 default HAVE_MP_TABLE=1
95 ## Build code to export a CMOS option table
97 default HAVE_OPTION_TABLE=1
100 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
102 default LB_CKS_RANGE_START=49
103 default LB_CKS_RANGE_END=122
104 default LB_CKS_LOC=123
107 ## Build code for SMP support
108 ## Only worry about 2 micro processors
111 default CONFIG_MAX_CPUS=1
114 ## Build code to setup a generic IOAPIC
116 default CONFIG_IOAPIC=1
119 ## Clean up the motherboard id strings
121 default MAINBOARD_PART_NUMBER="Tyan"
122 default MAINBOARD_VENDOR="s2850"
123 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1
124 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2850
127 ### LinuxBIOS layout values
130 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
131 default ROM_IMAGE_SIZE = 65536
134 ## Use a small 8K stack
136 default STACK_SIZE=0x2000
139 ## Use a small 16K heap
141 default HEAP_SIZE=0x4000
144 ## Only use the option table in a normal image
146 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
149 ## LinuxBIOS C code runs at this location in RAM
151 default _RAMBASE=0x00004000
154 ## Load the payload from the ROM
156 default CONFIG_ROM_STREAM = 1
159 ### Defaults of options that you may want to override in the target config file
163 ## The default compiler
169 ## Disable the gdb stub by default
171 default CONFIG_GDB_STUB=0
174 ## The Serial Console
177 # To Enable the Serial Console
178 default CONFIG_CONSOLE_SERIAL8250=1
180 ## Select the serial console baud rate
181 default TTYS0_BAUD=115200
182 #default TTYS0_BAUD=57600
183 #default TTYS0_BAUD=38400
184 #default TTYS0_BAUD=19200
185 #default TTYS0_BAUD=9600
186 #default TTYS0_BAUD=4800
187 #default TTYS0_BAUD=2400
188 #default TTYS0_BAUD=1200
190 # Select the serial console base port
191 default TTYS0_BASE=0x3f8
193 # Select the serial protocol
194 # This defaults to 8 data bits, 1 stop bit, and no parity
195 default TTYS0_LCS=0x3
198 ### Select the linuxBIOS loglevel
200 ## EMERG 1 system is unusable
201 ## ALERT 2 action must be taken immediately
202 ## CRIT 3 critical conditions
203 ## ERR 4 error conditions
204 ## WARNING 5 warning conditions
205 ## NOTICE 6 normal but significant condition
206 ## INFO 7 informational
207 ## DEBUG 8 debug-level messages
208 ## SPEW 9 Way too many details
210 ## Request this level of debugging output
211 default DEFAULT_CONSOLE_LOGLEVEL=8
212 ## At a maximum only compile in this level of debugging
213 default MAXIMUM_CONSOLE_LOGLEVEL=8
216 ## Select power on after power fail setting
217 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"