3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
9 uses CONFIG_MAX_PHYSICAL_CPUS
10 uses CONFIG_LOGICAL_CPUS
19 uses ROM_SECTION_OFFSET
20 uses CONFIG_ROM_STREAM
21 uses CONFIG_ROM_STREAM_START
22 uses CONFIG_COMPRESSED_ROM_STREAM_LZMA
30 uses LB_CKS_RANGE_START
33 uses MAINBOARD_PART_NUMBER
36 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
37 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
38 uses LINUXBIOS_EXTRA_VERSION
48 uses DEFAULT_CONSOLE_LOGLEVEL
49 uses MAXIMUM_CONSOLE_LOGLEVEL
50 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
51 uses CONFIG_CONSOLE_SERIAL8250
52 uses CONFIG_UDELAY_TSC
53 uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
54 uses CONFIG_CONSOLE_BTEXT
58 uses CONFIG_CONSOLE_VGA
59 uses CONFIG_PCI_ROM_RUN
66 ## ROM_SIZE is the size of boot ROM that this board will use.
68 default ROM_SIZE=524288
71 #default ROM_SIZE=1048576
75 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
77 default FALLBACK_SIZE=131072
84 ## Build code for the fallback boot
86 default HAVE_FALLBACK_BOOT=1
89 ## Build code to reset the motherboard from linuxBIOS
91 default HAVE_HARD_RESET=1
93 ## Delay timer options
95 default CONFIG_UDELAY_TSC=1
96 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
99 ## Build code to export a programmable irq routing table
101 default HAVE_PIRQ_TABLE=1
102 default IRQ_SLOT_COUNT=15
105 ## Build code to export an x86 MP table
106 ## Useful for specifying IRQ routing values
108 default HAVE_MP_TABLE=1
111 ## Build code to export a CMOS option table
113 default HAVE_OPTION_TABLE=1
116 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
118 default LB_CKS_RANGE_START=49
119 default LB_CKS_RANGE_END=122
120 default LB_CKS_LOC=123
123 ## Build code for SMP support
124 ## Only worry about 2 micro processors
127 default CONFIG_MAX_CPUS=4
128 default CONFIG_MAX_PHYSICAL_CPUS=2
129 default CONFIG_LOGICAL_CPUS=1
131 default SERIAL_CPU_INIT=0
134 #default CONFIG_CONSOLE_BTEXT=1
137 #default CONFIG_CONSOLE_VGA=1
138 #default CONFIG_PCI_ROM_RUN=1
141 ## enable CACHE_AS_RAM specifics
143 default USE_DCACHE_RAM=1
144 #default DCACHE_RAM_BASE=0xF2000000
145 default DCACHE_RAM_BASE=0xcf000
146 default DCACHE_RAM_SIZE=0x1000
147 #default CONFIG_USE_INIT=1
151 ## Build code to setup a generic IOAPIC
153 default CONFIG_IOAPIC=1
156 ## Clean up the motherboard id strings
158 default MAINBOARD_PART_NUMBER="s2735"
159 default MAINBOARD_VENDOR="Tyan"
160 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1
161 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2735
164 ### LinuxBIOS layout values
167 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
168 default ROM_IMAGE_SIZE = 65536
171 ## Use a small 8K stack
173 default STACK_SIZE=0x2000
176 ## Use a small 16K heap
178 default HEAP_SIZE=0x4000
181 ## Only use the option table in a normal image
183 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
186 ## LinuxBIOS C code runs at this location in RAM
188 default _RAMBASE=0x00004000
191 ## Load the payload from the ROM
193 default CONFIG_ROM_STREAM = 1
196 ### Defaults of options that you may want to override in the target config file
200 ## The default compiler
202 default CC="$(CROSS_COMPILE)gcc -m32"
206 ## Disable the gdb stub by default
208 default CONFIG_GDB_STUB=0
211 ## The Serial Console
214 # To Enable the Serial Console
215 default CONFIG_CONSOLE_SERIAL8250=1
217 ## Select the serial console baud rate
218 default TTYS0_BAUD=115200
219 #default TTYS0_BAUD=57600
220 #default TTYS0_BAUD=38400
221 #default TTYS0_BAUD=19200
222 #default TTYS0_BAUD=9600
223 #default TTYS0_BAUD=4800
224 #default TTYS0_BAUD=2400
225 #default TTYS0_BAUD=1200
227 # Select the serial console base port
228 default TTYS0_BASE=0x3f8
230 # Select the serial protocol
231 # This defaults to 8 data bits, 1 stop bit, and no parity
232 default TTYS0_LCS=0x3
235 ### Select the linuxBIOS loglevel
237 ## EMERG 1 system is unusable
238 ## ALERT 2 action must be taken immediately
239 ## CRIT 3 critical conditions
240 ## ERR 4 error conditions
241 ## WARNING 5 warning conditions
242 ## NOTICE 6 normal but significant condition
243 ## INFO 7 informational
244 ## DEBUG 8 debug-level messages
245 ## SPEW 9 Way too many details
247 ## Request this level of debugging output
248 default DEFAULT_CONSOLE_LOGLEVEL=8
249 ## At a maximum only compile in this level of debugging
250 default MAXIMUM_CONSOLE_LOGLEVEL=8
253 ## Select power on after power fail setting
254 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"