2 ## Config file for the Total Impact briQ
14 default PCIC0_CFGADDR=0xeec00000
15 default PCIC0_CFGDATA=0xeec00004
18 ## Set UART base address
20 default UART0_IO_BASE=0xef600300
23 ## Early board initialization, called from ppc_main()
38 ## Include the secondary Configuration files
40 southbridge winbond/w83c553 end
43 ## Build the objects we have code for in this directory.
46 addaction linuxbios.a "$(CROSS_COMPILE)ranlib linuxbios.a"