2 ## This file is part of the coreboot project.
4 ## Copyright (C) 2007 Kenji Noguchi <tokoy246@gmail.com>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 include /config/nofailovercalculation.lb
29 depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
30 action "../romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
32 makerule ./failover.inc
33 depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
34 action "../romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
37 # depends "$(MAINBOARD)/auto.c option_table.h ../romcc"
38 depends "$(MAINBOARD)/auto.c ../romcc"
39 action "../romcc -E -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
42 # depends "$(MAINBOARD)/auto.c option_table.h ../romcc"
43 depends "$(MAINBOARD)/auto.c ../romcc"
44 action "../romcc -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
46 mainboardinit cpu/x86/16bit/entry16.inc
47 mainboardinit cpu/x86/32bit/entry32.inc
48 ldscript /cpu/x86/16bit/entry16.lds
49 ldscript /cpu/x86/32bit/entry32.lds
51 mainboardinit cpu/x86/16bit/reset16.inc
52 ldscript /cpu/x86/16bit/reset16.lds
54 mainboardinit cpu/x86/32bit/reset32.inc
55 ldscript /cpu/x86/32bit/reset32.lds
57 mainboardinit arch/i386/lib/cpu_reset.inc
58 mainboardinit arch/i386/lib/id.inc
59 ldscript /arch/i386/lib/id.lds
61 ldscript /arch/i386/lib/failover.lds
62 mainboardinit ./failover.inc
64 mainboardinit cpu/x86/fpu/enable_fpu.inc
65 mainboardinit cpu/amd/model_gx1/cpu_setup.inc
66 mainboardinit cpu/amd/model_gx1/gx_setup.inc
67 mainboardinit ./auto.inc
72 chip northbridge/amd/gx1 # Northbridge
73 device pci_domain 0 on # PCI domain
74 device pci 0.0 on end # Host bridge
75 chip southbridge/amd/cs5530 # Southbridge
76 device pci 12.0 on # ISA bridge
77 chip superio/nsc/pc97317 # Super I/O
78 device pnp 2e.0 on # PS/2 keyboard
83 device pnp 2e.1 on # PS/2 mouse
86 device pnp 2e.2 on # RTC, Advanced power control (APC)
90 device pnp 2e.3 off # Floppy (N/A on this board)
95 device pnp 2e.4 on # Parallel port
99 device pnp 2e.5 on # COM2
103 device pnp 2e.6 on # COM1
107 device pnp 2e.7 on # GPIO
110 device pnp 2e.8 on # Power management
115 device pci 12.1 off end # SMI
116 device pci 12.2 on end # IDE
117 device pci 12.3 on end # Audio
118 device pci 12.4 on end # VGA (onboard)
119 device pci 13.0 on end # USB
120 device pci 14.0 on end # MiniPCI slot
121 device pci 15.0 on end # Ethernet (onboard)
122 register "ide0_enable" = "1"
123 register "ide1_enable" = "0" # Not available/needed on this board
126 chip cpu/amd/model_gx1 # CPU