2 ## This file is part of the coreboot project.
4 ## Copyright (C) 2007 Kenji Noguchi <tokoy246@gmail.com>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 ## CONFIG_XIP_ROM_SIZE must be a power of 2.
22 default CONFIG_XIP_ROM_SIZE = 64 * 1024
23 include /config/nofailovercalculation.lb
27 if CONFIG_GENERATE_PIRQ_TABLE
31 depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
32 action "../romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
34 makerule ./failover.inc
35 depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
36 action "../romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
39 # depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc"
40 depends "$(CONFIG_MAINBOARD)/auto.c ../romcc"
41 action "../romcc -E -O -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@"
44 # depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc"
45 depends "$(CONFIG_MAINBOARD)/auto.c ../romcc"
46 action "../romcc -O -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@"
48 mainboardinit cpu/x86/16bit/entry16.inc
49 mainboardinit cpu/x86/32bit/entry32.inc
50 ldscript /cpu/x86/16bit/entry16.lds
51 ldscript /cpu/x86/32bit/entry32.lds
52 if CONFIG_USE_FALLBACK_IMAGE
53 mainboardinit cpu/x86/16bit/reset16.inc
54 ldscript /cpu/x86/16bit/reset16.lds
56 mainboardinit cpu/x86/32bit/reset32.inc
57 ldscript /cpu/x86/32bit/reset32.lds
59 mainboardinit arch/i386/lib/cpu_reset.inc
60 mainboardinit arch/i386/lib/id.inc
61 ldscript /arch/i386/lib/id.lds
62 if CONFIG_USE_FALLBACK_IMAGE
63 ldscript /arch/i386/lib/failover.lds
64 mainboardinit ./failover.inc
66 mainboardinit cpu/x86/fpu/enable_fpu.inc
67 mainboardinit cpu/amd/model_gx1/cpu_setup.inc
68 mainboardinit cpu/amd/model_gx1/gx_setup.inc
69 mainboardinit ./auto.inc
74 chip northbridge/amd/gx1 # Northbridge
75 device pci_domain 0 on # PCI domain
76 device pci 0.0 on end # Host bridge
77 chip southbridge/amd/cs5530 # Southbridge
78 device pci 12.0 on # ISA bridge
79 chip superio/nsc/pc97317 # Super I/O
80 device pnp 2e.0 on # PS/2 keyboard
85 device pnp 2e.1 on # PS/2 mouse
88 device pnp 2e.2 on # RTC, Advanced power control (APC)
92 device pnp 2e.3 off # Floppy (N/A on this board)
97 device pnp 2e.4 on # Parallel port
101 device pnp 2e.5 on # COM2
105 device pnp 2e.6 on # COM1
109 device pnp 2e.7 on # GPIO
112 device pnp 2e.8 on # Power management
117 device pci 12.1 off end # SMI
118 device pci 12.2 on end # IDE
119 device pci 12.3 on end # Audio
120 device pci 12.4 on end # VGA (onboard)
121 device pci 13.0 on end # USB
122 device pci 14.0 on end # MiniPCI slot
123 device pci 15.0 on end # Ethernet (onboard)
124 register "ide0_enable" = "1"
125 register "ide1_enable" = "0" # Not available/needed on this board
128 chip cpu/amd/model_gx1 # CPU