src/mainboard/supermicro/x6dhe_g2/failover.c

   1 #define ASSEMBLY 1
   2 #include <stdint.h>
   3 #include <device/pci_def.h>
   4 #include <device/pci_ids.h>
   5 #include <arch/io.h>
   6 #include <arch/romcc_io.h>
   7 #include <cpu/x86/lapic.h>
   8 #include "pc80/serial.c"
   9 #include "arch/i386/lib/console.c"
  10 #include "pc80/mc146818rtc_early.c"
  11 #include "cpu/x86/lapic/boot_cpu.c"
  12 #include "northbridge/intel/e7520/memory_initialized.c"
  13
  14 static unsigned long main(unsigned long bist)
  15 {
  16         /* Did just the cpu reset? */
  17         if (memory_initialized()) {
  18                 if (last_boot_normal()) {
  19                         goto normal_image;
  20                 } else {
  21                         goto cpu_reset;
  22                 }
  23         }
  24
  25         /* This is the primary cpu how should I boot? */
  26         else if (do_normal_boot()) {
  27                 goto normal_image;
  28         }
  29         else {
  30                 goto fallback_image;
  31         }
  32  normal_image:
  33         asm volatile ("jmp __normal_image"
  34                 : /* outputs */
  35                 : "a" (bist) /* inputs */
  36                 : /* clobbers */
  37                 );
  38  cpu_reset:
  39         asm volatile ("jmp __cpu_reset"
  40                 : /* outputs */
  41                 : "a"(bist) /* inputs */
  42                 : /* clobbers */
  43                 );
  44  fallback_image:
  45         return bist;
  46 }