src/mainboard/supermicro/h8dmr_fam10/Config.lb

   1 ##
   2 ## This file is part of the coreboot project.
   3 ##
   4 ## Copyright (C) 2007 AMD
   5 ## Written by Yinghai Lu <yinghailu@amd.com> for AMD.
   6 ##
   7 ## This program is free software; you can redistribute it and/or modify
   8 ## it under the terms of the GNU General Public License as published by
   9 ## the Free Software Foundation; either version 2 of the License, or
  10 ## (at your option) any later version.
  11 ##
  12 ## This program is distributed in the hope that it will be useful,
  13 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 ## GNU General Public License for more details.
  16 ##
  17 ## You should have received a copy of the GNU General Public License
  18 ## along with this program; if not, write to the Free Software
  19 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  20 ##
  21
  22 ## CONFIG_XIP_ROM_SIZE must be a power of 2.
  23 # for testing with -O != s. FIXME
  24 #default CONFIG_XIP_ROM_SIZE = 128 * 1024
  25 default CONFIG_XIP_ROM_SIZE = 128 * 1024
  26 include /config/failovercalculation.lb
  27
  28 arch i386 end
  29
  30 ##
  31 ## Build the objects we have code for in this directory.
  32 ##
  33
  34 driver mainboard.o
  35 #needed by irq_tables and mptable and acpi_tables
  36 object get_bus_conf.o
  37
  38 if CONFIG_GENERATE_MP_TABLE object mptable.o end
  39 if CONFIG_GENERATE_PIRQ_TABLE object irq_tables.o end
  40
  41         if CONFIG_USE_INIT
  42                 makerule ./auto.o
  43                         depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
  44                         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
  45                 end
  46         else
  47                 makerule ./auto.inc
  48                         depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
  49                         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
  50                         action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
  51                         action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
  52                 end
  53         end
  54
  55 if CONFIG_USE_FAILOVER_IMAGE
  56 else
  57     if CONFIG_AP_CODE_IN_CAR
  58         makerule ./apc_auto.o
  59                 depends "$(CONFIG_MAINBOARD)/apc_auto.c option_table.h"
  60                 action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(CONFIG_MAINBOARD)/apc_auto.c -o $@"
  61         end
  62     end
  63 end
  64
  65
  66 ##
  67 ## Build our 16 bit and 32 bit coreboot entry code
  68 ##
  69 if CONFIG_HAVE_FAILOVER_BOOT
  70     if CONFIG_USE_FAILOVER_IMAGE
  71         mainboardinit cpu/x86/16bit/entry16.inc
  72         ldscript /cpu/x86/16bit/entry16.lds
  73     end
  74 else
  75     if CONFIG_USE_FALLBACK_IMAGE
  76         mainboardinit cpu/x86/16bit/entry16.inc
  77         ldscript /cpu/x86/16bit/entry16.lds
  78     end
  79 end
  80
  81 mainboardinit cpu/x86/32bit/entry32.inc
  82
  83         if CONFIG_USE_INIT
  84                 ldscript /cpu/x86/32bit/entry32.lds
  85         end
  86
  87         if CONFIG_USE_INIT
  88                 ldscript /cpu/amd/car/cache_as_ram.lds
  89         end
  90
  91 ##
  92 ## Build our reset vector (This is where coreboot is entered)
  93 ##
  94 if CONFIG_HAVE_FAILOVER_BOOT
  95     if CONFIG_USE_FAILOVER_IMAGE
  96         mainboardinit cpu/x86/16bit/reset16.inc
  97         ldscript /cpu/x86/16bit/reset16.lds
  98     else
  99         mainboardinit cpu/x86/32bit/reset32.inc
 100         ldscript /cpu/x86/32bit/reset32.lds
 101     end
 102 else
 103     if CONFIG_USE_FALLBACK_IMAGE
 104         mainboardinit cpu/x86/16bit/reset16.inc
 105         ldscript /cpu/x86/16bit/reset16.lds
 106     else
 107         mainboardinit cpu/x86/32bit/reset32.inc
 108         ldscript /cpu/x86/32bit/reset32.lds
 109     end
 110 end
 111
 112 ##
 113 ## Include an id string (For safe flashing)
 114 ##
 115 mainboardinit southbridge/nvidia/mcp55/id.inc
 116 ldscript /southbridge/nvidia/mcp55/id.lds
 117
 118 ##
 119 ## ROMSTRAP table for MCP55
 120 ##
 121 if CONFIG_HAVE_FAILOVER_BOOT
 122     if CONFIG_USE_FAILOVER_IMAGE
 123         mainboardinit southbridge/nvidia/mcp55/romstrap.inc
 124         ldscript /southbridge/nvidia/mcp55/romstrap.lds
 125     end
 126 else
 127     if CONFIG_USE_FALLBACK_IMAGE
 128         mainboardinit southbridge/nvidia/mcp55/romstrap.inc
 129         ldscript /southbridge/nvidia/mcp55/romstrap.lds
 130     end
 131 end
 132
 133         ##
 134         ## Setup Cache-As-Ram
 135         ##
 136         mainboardinit cpu/amd/car/cache_as_ram.inc
 137
 138 ###
 139 ### This is the early phase of coreboot startup
 140 ### Things are delicate and we test to see if we should
 141 ### failover to another image.
 142 ###
 143 if CONFIG_HAVE_FAILOVER_BOOT
 144     if CONFIG_USE_FAILOVER_IMAGE
 145                 ldscript /arch/i386/lib/failover_failover.lds
 146     end
 147 else
 148     if CONFIG_USE_FALLBACK_IMAGE
 149                 ldscript /arch/i386/lib/failover.lds
 150     end
 151 end
 152
 153 ##
 154 ## Setup RAM
 155 ##
 156         if CONFIG_USE_INIT
 157                 initobject auto.o
 158         else
 159                 mainboardinit ./auto.inc
 160         end
 161
 162 ##
 163 ## Include the secondary Configuration files
 164 ##
 165 config chip.h
 166
 167 dir /southbridge/nvidia/mcp55
 168
 169 chip northbridge/amd/amdfam10/root_complex
 170         device apic_cluster 0 on
 171                 chip cpu/amd/socket_F_1207
 172                         device apic 0 on end
 173                 end
 174         end
 175         device pci_domain 0 on
 176                 chip northbridge/amd/amdfam10 #mc0
 177                         device pci 18.0 on end
 178                         device pci 18.0 on end
 179                         device pci 18.0 on
 180         # SB on link 2.0
 181                                 chip southbridge/nvidia/mcp55
 182                                         device pci 0.0 on end   # HT
 183                                         device pci 1.0 on # LPC
 184                                                 chip superio/winbond/w83627hf
 185                                                         device pnp 2e.0 off #  Floppy
 186                                                                 io 0x60 = 0x3f0
 187                                                                 irq 0x70 = 6
 188                                                                 drq 0x74 = 2
 189                                                         end
 190                                                         device pnp 2e.1 off #  Parallel Port
 191                                                                 io 0x60 = 0x378
 192                                                                 irq 0x70 = 7
 193                                                         end
 194                                                         device pnp 2e.2 on #  Com1
 195                                                                 io 0x60 = 0x3f8
 196                                                                 irq 0x70 = 4
 197                                                         end
 198                                                         device pnp 2e.3 on #  Com2
 199                                                                 io 0x60 = 0x2f8
 200                                                                 irq 0x70 = 3
 201                                                         end
 202                                                         device pnp 2e.5 on #  Keyboard
 203                                                                 io 0x60 = 0x60
 204                                                                 io 0x62 = 0x64
 205                                                                 irq 0x70 = 1
 206                                                                 irq 0x72 = 12
 207                                                         end
 208                                                         device pnp 2e.6 off  # SFI
 209                                                                 io 0x62 = 0x100
 210                                                         end
 211                                                         device pnp 2e.7 off #  GPIO_GAME_MIDI
 212                                                                 io 0x60 = 0x220
 213                                                                 io 0x62 = 0x300
 214                                                                 irq 0x70 = 9
 215                                                         end
 216                                                         device pnp 2e.8 off end #  WDTO_PLED
 217                                                         device pnp 2e.9 off end #  GPIO_SUSLED
 218                                                         device pnp 2e.a off end #  ACPI
 219                                                         device pnp 2e.b on #  HW Monitor
 220                                                                 io 0x60 = 0x290
 221                                                                 irq 0x70 = 5
 222                                                         end
 223                                                 end
 224                                         end
 225                                         device pci 1.1 on # SM 0
 226                                                 chip drivers/generic/generic #dimm 0-0-0
 227                                                         device i2c 50 on end
 228                                                 end
 229                                                 chip drivers/generic/generic #dimm 0-0-1
 230                                                         device i2c 51 on end
 231                                                 end
 232                                                 chip drivers/generic/generic #dimm 0-1-0
 233                                                         device i2c 52 on end
 234                                                 end
 235                                                 chip drivers/generic/generic #dimm 0-1-1
 236                                                         device i2c 53 on end
 237                                                 end
 238                                                 chip drivers/generic/generic #dimm 1-0-0
 239                                                         device i2c 54 on end
 240                                                 end
 241                                                 chip drivers/generic/generic #dimm 1-0-1
 242                                                         device i2c 55 on end
 243                                                 end
 244                                                 chip drivers/generic/generic #dimm 1-1-0
 245                                                         device i2c 56 on end
 246                                                 end
 247                                                 chip drivers/generic/generic #dimm 1-1-1
 248                                                         device i2c 57 on end
 249                                                 end
 250                                         end # SM
 251                                         device pci 1.1 on # SM 1
 252 #PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus?
 253 #                                                chip drivers/generic/generic #PCIXA Slot1
 254 #                                                        device i2c 50 on end
 255 #                                                end
 256 #                                                chip drivers/generic/generic #PCIXB Slot1
 257 #                                                        device i2c 51 on end
 258 #                                                end
 259 #                                                chip drivers/generic/generic #PCIXB Slot2
 260 #                                                        device i2c 52 on end
 261 #                                                end
 262 #                                                chip drivers/generic/generic #PCI Slot1
 263 #                                                        device i2c 53 on end
 264 #                                                end
 265 #                                                chip drivers/generic/generic #Master MCP55 PCI-E
 266 #                                                        device i2c 54 on end
 267 #                                                end
 268 #                                                chip drivers/generic/generic #Slave MCP55 PCI-E
 269 #                                                        device i2c 55 on end
 270 #                                                end
 271                                                 chip drivers/generic/generic #MAC EEPROM
 272                                                         device i2c 51 on end
 273                                                 end
 274
 275                                         end # SM
 276                                         device pci 2.0 on end # USB 1.1
 277                                         device pci 2.1 on end # USB 2
 278                                         device pci 4.0 on end # IDE
 279                                         device pci 5.0 on end # SATA 0
 280                                         device pci 5.1 on end # SATA 1
 281                                         device pci 5.2 on end # SATA 2
 282                                         device pci 6.0 on  # PCI
 283                                                 device pci 6.0 on end
 284                                         end
 285                                         device pci 6.1 on end # AZA
 286                                         device pci 8.0 on end # NIC
 287                                         device pci 9.0 on end # NIC
 288                                         device pci a.0 on  # PCI E 5
 289                                                 device pci 0.0 on #nec pci-x
 290                                                 end
 291                                                 device pci 0.1 on #nec pci-x
 292                                                         device pci 4.0 on end #scsi
 293                                                         device pci 4.1 on end #scsi
 294                                                 end
 295                                         end
 296                                         device pci b.0 on end # PCI E 4
 297                                         device pci c.0 on end # PCI E 3
 298                                         device pci d.0 on end # PCI E 2
 299                                         device pci e.0 on end # PCI E 1
 300                                         device pci f.0 on end # PCI E 0
 301                                         register "ide0_enable" = "1"
 302                                         register "sata0_enable" = "1"
 303                                         register "sata1_enable" = "1"
 304                                         register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
 305                                         register "mac_eeprom_addr" = "0x51"
 306                                 end
 307                         end #  device pci 18.0
 308                         device pci 18.1 on end
 309                         device pci 18.2 on end
 310                         device pci 18.3 on end
 311                         device pci 18.4 on end
 312                         device pci 19.0 on end
 313                         device pci 19.1 on end
 314                         device pci 19.2 on end
 315                         device pci 19.3 on end
 316                         device pci 19.4 on end
 317                 end # mc0
 318
 319         end # PCI domain
 320
 321 #       chip drivers/generic/debug
 322 #               device pnp 0.0 off end # chip name
 323 #                device pnp 0.1 on end # pci_regs_all
 324 #                device pnp 0.2 off end # mem
 325 #                device pnp 0.3 off end # cpuid
 326 #                device pnp 0.4 on end # smbus_regs_all
 327 #                device pnp 0.5 off end # dual core msr
 328 #                device pnp 0.6 off end # cache size
 329 #                device pnp 0.7 off end # tsc
 330 #                device pnp 0.8 off  end # io
 331 #                device pnp 0.9 on end # io
 332 #       end
 333 end #root_complex