3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
9 uses CONFIG_MAX_PHYSICAL_CPUS
10 uses CONFIG_LOGICAL_CPUS
18 uses ROM_SECTION_OFFSET
19 uses CONFIG_ROM_PAYLOAD
20 uses CONFIG_ROM_PAYLOAD_START
21 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
29 uses LB_CKS_RANGE_START
33 uses MAINBOARD_PART_NUMBER
35 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
36 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
37 uses LINUXBIOS_EXTRA_VERSION
47 uses DEFAULT_CONSOLE_LOGLEVEL
48 uses MAXIMUM_CONSOLE_LOGLEVEL
49 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
50 uses CONFIG_CONSOLE_SERIAL8250
54 uses CONFIG_CONSOLE_VGA
55 uses CONFIG_PCI_ROM_RUN
56 uses HW_MEM_HOLE_SIZEK
57 uses K8_HT_FREQ_1G_SUPPORT
64 uses ENABLE_APIC_EXT_ID
68 uses HT_CHAIN_UNITID_BASE
69 uses HT_CHAIN_END_UNITID_BASE
70 uses SB_HT_CHAIN_ON_BUS0
71 uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
73 ## ROM_SIZE is the size of boot ROM that this board will use.
75 #default ROM_SIZE=524288
78 default ROM_SIZE=1048576
81 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
83 #default FALLBACK_SIZE=131072
85 default FALLBACK_SIZE=0x40000
92 ## Build code for the fallback boot
94 default HAVE_FALLBACK_BOOT=1
97 ## Build code to reset the motherboard from linuxBIOS
99 default HAVE_HARD_RESET=1
102 ## Build code to export a programmable irq routing table
104 default HAVE_PIRQ_TABLE=1
105 default IRQ_SLOT_COUNT=11
108 ## Build code to export an x86 MP table
109 ## Useful for specifying IRQ routing values
111 default HAVE_MP_TABLE=1
114 ## Build code to export a CMOS option table
116 default HAVE_OPTION_TABLE=1
119 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
121 default LB_CKS_RANGE_START=49
122 default LB_CKS_RANGE_END=122
123 default LB_CKS_LOC=123
126 ## Build code for SMP support
127 ## Only worry about 2 micro processors
130 default CONFIG_MAX_CPUS=4
131 default CONFIG_MAX_PHYSICAL_CPUS=2
132 default CONFIG_LOGICAL_CPUS=1
135 #default CONFIG_CHIP_NAME=1
138 default HW_MEM_HOLE_SIZEK=0x100000
140 #Opteron K8 1G HT Support
141 default K8_HT_FREQ_1G_SUPPORT=1
143 ##HT Unit ID offset, default is 1, the typical one
144 default HT_CHAIN_UNITID_BASE=0x0
146 ##real SB Unit ID, default is 0x20, mean dont touch it at last
147 #default HT_CHAIN_END_UNITID_BASE=0x0
149 #make the SB HT chain on bus 0, default is not (0)
150 default SB_HT_CHAIN_ON_BUS0=2
152 ##only offset for SB chain?, default is yes(1)
153 default SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
156 default CONFIG_CONSOLE_VGA=1
157 default CONFIG_PCI_ROM_RUN=1
160 ## enable CACHE_AS_RAM specifics
162 default USE_DCACHE_RAM=1
163 default DCACHE_RAM_BASE=0xcf000
164 default DCACHE_RAM_SIZE=0x1000
165 default CONFIG_USE_INIT=0
167 default ENABLE_APIC_EXT_ID=1
168 default APIC_ID_OFFSET=0x10
169 default LIFT_BSP_APIC_ID=0
173 ## Build code to setup a generic IOAPIC
175 default CONFIG_IOAPIC=1
178 ## Clean up the motherboard id strings
180 default MAINBOARD_PART_NUMBER="ultra40"
181 default MAINBOARD_VENDOR="sunw"
183 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x108e
184 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x40
187 ### LinuxBIOS layout values
190 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
191 default ROM_IMAGE_SIZE = 65536
194 ## Use a small 8K stack
196 default STACK_SIZE=0x2000
199 ## Use a small 16K heap
201 default HEAP_SIZE=0x4000
204 ## Only use the option table in a normal image
206 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
209 ## LinuxBIOS C code runs at this location in RAM
211 default _RAMBASE=0x00004000
214 ## Load the payload from the ROM
216 default CONFIG_ROM_PAYLOAD = 1
219 ### Defaults of options that you may want to override in the target config file
223 ## The default compiler
225 default CC="$(CROSS_COMPILE)gcc -m32"
229 ## Disable the gdb stub by default
231 default CONFIG_GDB_STUB=0
234 ## The Serial Console
237 # To Enable the Serial Console
238 default CONFIG_CONSOLE_SERIAL8250=1
240 ## Select the serial console baud rate
241 default TTYS0_BAUD=115200
242 #default TTYS0_BAUD=57600
243 #default TTYS0_BAUD=38400
244 #default TTYS0_BAUD=19200
245 #default TTYS0_BAUD=9600
246 #default TTYS0_BAUD=4800
247 #default TTYS0_BAUD=2400
248 #default TTYS0_BAUD=1200
250 # Select the serial console base port
251 default TTYS0_BASE=0x3f8
253 # Select the serial protocol
254 # This defaults to 8 data bits, 1 stop bit, and no parity
255 default TTYS0_LCS=0x3
258 ### Select the linuxBIOS loglevel
260 ## EMERG 1 system is unusable
261 ## ALERT 2 action must be taken immediately
262 ## CRIT 3 critical conditions
263 ## ERR 4 error conditions
264 ## WARNING 5 warning conditions
265 ## NOTICE 6 normal but significant condition
266 ## INFO 7 informational
267 ## DEBUG 8 debug-level messages
268 ## SPEW 9 Way too many details
270 ## Request this level of debugging output
271 default DEFAULT_CONSOLE_LOGLEVEL=8
272 ## At a maximum only compile in this level of debugging
273 default MAXIMUM_CONSOLE_LOGLEVEL=8
276 ## Select power on after power fail setting
277 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"