2 * This file is part of the coreboot project.
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <console/console.h>
21 #include <arch/smp/mpspec.h>
22 #include <device/pci.h>
27 #include <cpu/amd/amdk8_sysconf.h>
29 extern u8 bus_rs690[8];
30 extern u8 bus_sb600[2];
32 extern u32 apicid_sb600;
34 extern u32 sbdn_rs690;
35 extern u32 sbdn_sb600;
37 static void *smp_write_config_table(void *v)
39 struct mp_config_table *mc;
42 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
43 mptable_init(mc, LAPIC_ADDR);
44 smp_write_processors(mc);
47 printk(BIOS_DEBUG, "%s: apic_id=0x%x\n", __func__, apicid_sb600);
49 mptable_write_buses(mc, NULL, &isa_bus);
50 /* I/O APICs: APIC ID Version State Address */
54 dev = dev_find_slot(bus_sb600[0], PCI_DEVFN(sbdn_sb600 + 0x14, 0));
57 res = find_resource(dev, 0x74);
58 smp_write_ioapic(mc, apicid_sb600, 0x20, res->base);
61 mptable_add_isa_interrupts(mc, isa_bus, apicid_sb600, 0);
63 /* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
64 mptable_lintsrc(mc, isa_bus);
66 /* Compute the checksums */
67 return mptable_finalize(mc);
70 unsigned long write_smp_table(unsigned long addr)
73 v = smp_write_floating_table(addr, 0);
74 return (unsigned long)smp_write_config_table(v);