2 ## This file is part of the coreboot project.
4 ## Copyright (C) 2007-2009 coresystems GmbH
6 ## This program is free software; you can redistribute it and/or
7 ## modify it under the terms of the GNU General Public License as
8 ## published by the Free Software Foundation; version 2 of
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 chip northbridge/intel/i945
24 device lapic_cluster 0 on
25 chip cpu/intel/socket_mFCPGA478
30 device pci_domain 0 on
31 device pci 00.0 on end # host bridge
33 #device pci 01.0 off end # i945 PCIe root port
34 #device pci 02.0 on end # vga controller
35 #device pci 02.1 on end # display controller
37 chip southbridge/intel/i82801gx
38 register "pirqa_routing" = "0x0b"
39 register "pirqb_routing" = "0x0b"
40 register "pirqc_routing" = "0x0b"
41 register "pirqd_routing" = "0x0b"
42 register "pirqe_routing" = "0x80"
43 register "pirqf_routing" = "0x80"
44 register "pirqg_routing" = "0x0b"
45 register "pirqh_routing" = "0x0b"
48 # 0 No effect (default)
49 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
50 # 2 SCI (if corresponding GPIO_EN bit is also set)
51 register "gpi13_routing" = "2"
52 register "gpi8_routing" = "1"
53 register "gpi7_routing" = "2"
54 register "gpe0_en" = "0x20800007"
56 register "ide_legacy_combined" = "0x1"
57 register "ide_enable_primary" = "0x1"
58 register "ide_enable_secondary" = "0x0"
59 register "sata_ahci" = "0x0"
61 device pci 1b.0 on end # High Definition Audio
62 device pci 1c.0 on end # PCIe
63 device pci 1c.1 on end # PCIe
64 device pci 1c.2 on end # PCIe
65 #device pci 1c.3 off end # PCIe port 4
66 #device pci 1c.4 off end # PCIe port 5
67 #device pci 1c.5 off end # PCIe port 6
68 device pci 1d.0 on end # USB UHCI
69 device pci 1d.1 on end # USB UHCI
70 device pci 1d.2 on end # USB UHCI
71 device pci 1d.3 on end # USB UHCI
72 device pci 1d.7 on end # USB2 EHCI
74 chip southbridge/ti/pci7420
75 register "smartcard_enabled" = "0x0"
79 device pci 3.3 off end # smartcard
82 #device pci 1e.2 off end # AC'97 Audio
83 #device pci 1e.3 off end # AC'97 Modem
84 device pci 1f.0 on # LPC bridge
85 chip superio/smsc/lpc47n227
86 device pnp 2e.1 off # Parallel port
88 device pnp 2e.2 on # COM1
92 device pnp 2e.3 on # COM2
96 device pnp 2e.5 off # Keyboard+Mouse
103 chip superio/renesas/m3885x
104 device pnp ff.1 on # dummy address
109 #device pci 1f.1 off end # IDE
110 device pci 1f.2 on end # SATA
111 device pci 1f.3 on end # SMBus
112 #device pci 1f.4 off end # Realtek ID Codec