1 uses CONFIG_HAVE_MP_TABLE
2 uses CONFIG_HAVE_PIRQ_TABLE
3 uses CONFIG_USE_FALLBACK_IMAGE
4 uses CONFIG_HAVE_FALLBACK_BOOT
5 uses CONFIG_HAVE_HARD_RESET
6 uses CONFIG_IRQ_SLOT_COUNT
7 uses CONFIG_HAVE_OPTION_TABLE
9 uses CONFIG_MAX_PHYSICAL_CPUS
10 uses CONFIG_LOGICAL_CPUS
13 uses CONFIG_FALLBACK_SIZE
15 uses CONFIG_ROM_SECTION_SIZE
16 uses CONFIG_ROM_IMAGE_SIZE
17 uses CONFIG_ROM_SECTION_SIZE
18 uses CONFIG_ROM_SECTION_OFFSET
19 uses CONFIG_ROM_PAYLOAD
20 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
21 uses CONFIG_PRECOMPRESSED_PAYLOAD
23 uses CONFIG_XIP_ROM_SIZE
24 uses CONFIG_XIP_ROM_BASE
25 uses CONFIG_STACK_SIZE
27 uses CONFIG_USE_OPTION_TABLE
28 uses CONFIG_LB_CKS_RANGE_START
29 uses CONFIG_LB_CKS_RANGE_END
30 uses CONFIG_LB_CKS_LOC
31 uses CONFIG_MAINBOARD_PART_NUMBER
32 uses CONFIG_MAINBOARD_VENDOR
34 uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
35 uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
36 uses COREBOOT_EXTRA_VERSION
38 uses CONFIG_TTYS0_BAUD
39 uses CONFIG_TTYS0_BASE
41 uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
42 uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
43 uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
44 uses CONFIG_CONSOLE_SERIAL8250
45 uses CONFIG_HAVE_INIT_TIMER
47 uses CONFIG_CROSS_COMPILE
51 uses CONFIG_CONSOLE_VGA
52 uses CONFIG_PCI_ROM_RUN
53 uses CONFIG_HW_MEM_HOLE_SIZEK
55 uses CONFIG_USE_DCACHE_RAM
56 uses CONFIG_DCACHE_RAM_BASE
57 uses CONFIG_DCACHE_RAM_SIZE
59 uses CONFIG_USE_PRINTK_IN_CAR
66 ## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
68 default CONFIG_ROM_SIZE=524288
71 ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
73 default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
76 ## Build code for the fallback boot
78 default CONFIG_HAVE_FALLBACK_BOOT=1
81 ## Build code to reset the motherboard from coreboot
83 default CONFIG_HAVE_HARD_RESET=1
86 ## Build code to export a programmable irq routing table
88 default CONFIG_HAVE_PIRQ_TABLE=1
89 default CONFIG_IRQ_SLOT_COUNT=9
92 ## Build code to export an x86 MP table
93 ## Useful for specifying IRQ routing values
95 default CONFIG_HAVE_MP_TABLE=1
98 ## Build code to export a CMOS option table
100 default CONFIG_HAVE_OPTION_TABLE=1
103 ## Move the default coreboot cmos range off of AMD RTC registers
105 default CONFIG_LB_CKS_RANGE_START=49
106 default CONFIG_LB_CKS_RANGE_END=122
107 default CONFIG_LB_CKS_LOC=123
110 ## Build code for SMP support
111 ## Only worry about 2 micro processors
114 default CONFIG_MAX_CPUS=4
115 default CONFIG_MAX_PHYSICAL_CPUS=2
116 default CONFIG_LOGICAL_CPUS=1
119 default CONFIG_HW_MEM_HOLE_SIZEK=0x100000
122 default CONFIG_CONSOLE_VGA=1
123 default CONFIG_PCI_ROM_RUN=1
127 ## enable CACHE_AS_RAM specifics
129 default CONFIG_USE_DCACHE_RAM=1
130 default CONFIG_DCACHE_RAM_BASE=0xcf000
131 default CONFIG_DCACHE_RAM_SIZE=0x1000
132 default CONFIG_USE_INIT=0
135 ## Build code to setup a generic IOAPIC
137 default CONFIG_IOAPIC=1
140 ## Clean up the motherboard id strings
142 default CONFIG_MAINBOARD_PART_NUMBER="Khepri"
143 default CONFIG_MAINBOARD_VENDOR="Newisys"
144 default CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x17c2
145 default CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x0010
148 ### coreboot layout values
151 ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
152 default CONFIG_ROM_IMAGE_SIZE = 65536
155 ## Use a small 8K stack
157 default CONFIG_STACK_SIZE=0x2000
160 ## Use a small 16K heap
162 default CONFIG_HEAP_SIZE=0x4000
165 ## Only use the option table in a normal image
167 default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE
170 ## Coreboot C code runs at this location in RAM
172 default CONFIG_RAMBASE=0x00004000
175 ## Load the payload from the ROM
177 default CONFIG_ROM_PAYLOAD = 1
180 ### Defaults of options that you may want to override in the target config file
184 ## The default compiler
186 default CC="$(CONFIG_CROSS_COMPILE)gcc -m32"
190 ## Disable the gdb stub by default
192 default CONFIG_GDB_STUB=0
194 default CONFIG_USE_PRINTK_IN_CAR=1
197 ## The Serial Console
200 # To Enable the Serial Console
201 default CONFIG_CONSOLE_SERIAL8250=1
203 ## Select the serial console baud rate
204 default CONFIG_TTYS0_BAUD=115200
205 #default CONFIG_TTYS0_BAUD=57600
206 #default CONFIG_TTYS0_BAUD=38400
207 #default CONFIG_TTYS0_BAUD=19200
208 #default CONFIG_TTYS0_BAUD=9600
209 #default CONFIG_TTYS0_BAUD=4800
210 #default CONFIG_TTYS0_BAUD=2400
211 #default CONFIG_TTYS0_BAUD=1200
213 # Select the serial console base port
214 default CONFIG_TTYS0_BASE=0x3f8
216 # Select the serial protocol
217 # This defaults to 8 data bits, 1 stop bit, and no parity
218 default CONFIG_TTYS0_LCS=0x3
221 ### Select the coreboot loglevel
223 ## EMERG 1 system is unusable
224 ## ALERT 2 action must be taken immediately
225 ## CRIT 3 critical conditions
226 ## ERR 4 error conditions
227 ## WARNING 5 warning conditions
228 ## NOTICE 6 normal but significant condition
229 ## INFO 7 informational
230 ## CONFIG_DEBUG 8 debug-level messages
231 ## SPEW 9 Way too many details
233 ## Request this level of debugging output
234 default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
235 ## At a maximum only compile in this level of debugging
236 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
239 ## Select power on after power fail setting
240 default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"