src/mainboard/newisys/khepri/Config.lb

   1 ##
   2 ## Compute the location and size of where this firmware image
   3 ## (coreboot plus bootloader) will live in the boot rom chip.
   4 ##
   5 if USE_FALLBACK_IMAGE
   6         default ROM_SECTION_SIZE   = FALLBACK_SIZE
   7         default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
   8 else
   9         default ROM_SECTION_SIZE   = ( ROM_SIZE - FALLBACK_SIZE )
  10         default ROM_SECTION_OFFSET = 0
  11 end
  12
  13 ##
  14 ## Compute the start location and size size of
  15 ## The coreboot bootloader.
  16 ##
  17 default PAYLOAD_SIZE            = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
  18 default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
  19
  20 ##
  21 ## Compute where this copy of coreboot will start in the boot rom
  22 ##
  23 default _ROMBASE      = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
  24
  25 ##
  26 ## Compute a range of ROM that can cached to speed up coreboot,
  27 ## execution speed.
  28 ##
  29 ## XIP_ROM_SIZE must be a power of 2.
  30 ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
  31 ##
  32 default XIP_ROM_SIZE=65536
  33 default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
  34
  35 ##
  36 ## Set all of the defaults for an x86 architecture
  37 ##
  38
  39 arch i386 end
  40
  41 ##
  42 ## Build the objects we have code for in this directory.
  43 ##
  44
  45 driver mainboard.o
  46 if HAVE_MP_TABLE object mptable.o end
  47 if HAVE_PIRQ_TABLE object irq_tables.o end
  48 #object reset.o
  49
  50 if CONFIG_USE_INIT
  51
  52 makerule ./auto.o
  53         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
  54         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c $(MAINBOARD)/cache_as_ram_auto.c -o $@"
  55 end
  56
  57 else
  58
  59 makerule ./auto.inc
  60         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
  61         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c -S $(MAINBOARD)/cache_as_ram_auto.c -o $@"
  62         action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
  63         action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
  64 end
  65
  66 end
  67
  68 ##
  69 ## Build our 16 bit and 32 bit coreboot entry code
  70 ##
  71 if USE_FALLBACK_IMAGE
  72         mainboardinit cpu/x86/16bit/entry16.inc
  73         ldscript /cpu/x86/16bit/entry16.lds
  74 end
  75
  76 mainboardinit cpu/x86/32bit/entry32.inc
  77
  78         if CONFIG_USE_INIT
  79                 ldscript /cpu/x86/32bit/entry32.lds
  80         end
  81
  82         if CONFIG_USE_INIT
  83                 ldscript      /cpu/amd/car/cache_as_ram.lds
  84         end
  85
  86 ##
  87 ## Build our reset vector (This is where coreboot is entered)
  88 ##
  89 if USE_FALLBACK_IMAGE
  90         mainboardinit cpu/x86/16bit/reset16.inc
  91         ldscript /cpu/x86/16bit/reset16.lds
  92 else
  93         mainboardinit cpu/x86/32bit/reset32.inc
  94         ldscript /cpu/x86/32bit/reset32.lds
  95 end
  96
  97 ##
  98 ## Include an id string (For safe flashing)
  99 ##
 100 mainboardinit arch/i386/lib/id.inc
 101 ldscript /arch/i386/lib/id.lds
 102
 103 ##
 104 ## Setup Cache-As-Ram
 105 ##
 106 mainboardinit cpu/amd/car/cache_as_ram.inc
 107
 108 ###
 109 ### This is the early phase of coreboot startup
 110 ### Things are delicate and we test to see if we should
 111 ### failover to another image.
 112 ###
 113 if USE_FALLBACK_IMAGE
 114         ldscript /arch/i386/lib/failover.lds
 115 end
 116
 117 ###
 118 ### O.k. We aren't just an intermediary anymore!
 119 ###
 120
 121 ##
 122 ## Setup RAM
 123 ##
 124 if CONFIG_USE_INIT
 125 initobject auto.o
 126 else
 127 mainboardinit ./auto.inc
 128 end
 129
 130 config chip.h
 131
 132 # FIXME: ROM for onboard VGA
 133
 134 chip northbridge/amd/amdk8/root_complex
 135         device apic_cluster 0 on
 136                 chip cpu/amd/socket_940
 137                         device apic 0 on end
 138                 end
 139                 chip cpu/amd/socket_940
 140                         device apic 1 on end
 141                 end
 142         end
 143
 144         device pci_domain 0 on
 145                 chip northbridge/amd/amdk8
 146                         device pci 18.0 on end # LDT 0
 147                         device pci 18.0 on     # LDT 1
 148                                 chip southbridge/amd/amd8131
 149                                         device pci 0.0 on end
 150                                         device pci 0.1 on end
 151                                         device pci 1.0 on end
 152                                         device pci 1.1 on end
 153                                 end
 154                                 chip southbridge/amd/amd8111
 155                                         device pci 0.0 on
 156                                                 device pci 0.0 on end
 157                                                 device pci 0.1 on end
 158                                                 device pci 0.2 on end
 159                                                 device pci 1.0 on end
 160                                         end
 161                                         device pci 1.0 on
 162                                                 chip superio/winbond/w83627hf
 163                                                         device pnp 2e.0 on #  Floppy
 164                                                                 io 0x60 = 0x3f0
 165                                                                 irq 0x70 = 6
 166                                                                 drq 0x74 = 2
 167                                                         end
 168                                                         device pnp 2e.1 off #  Parallel Port
 169                                                                 io 0x60 = 0x378
 170                                                                 irq 0x70 = 7
 171                                                         end
 172                                                         device pnp 2e.2 on #  Com1
 173                                                                 io 0x60 = 0x3f8
 174                                                                 irq 0x70 = 4
 175                                                         end
 176                                                         device pnp 2e.3 on #  Com2
 177                                                                 io 0x60 = 0x2f8
 178                                                                 irq 0x70 = 3
 179                                                         end
 180                                                         device pnp 2e.5 on #  Keyboard
 181                                                                 io 0x60 = 0x60
 182                                                                 io 0x62 = 0x64
 183                                                                 irq 0x70 = 1
 184                                                                 irq 0x72 = 12
 185                                                         end
 186                                                         device pnp 2e.6 off #  CIR
 187                                                                 io 0x60 = 0x100
 188                                                         end
 189                                                         device pnp 2e.7 off #  GAME_MIDI_GIPO1
 190                                                                 io 0x60 = 0x220
 191                                                                 io 0x62 = 0x300
 192                                                                 irq 0x70 = 9
 193                                                         end
 194                                                         device pnp 2e.8 off end #  GPIO2
 195                                                         device pnp 2e.9 off end #  GPIO3
 196                                                         device pnp 2e.a off end #  ACPI
 197                                                         device pnp 2e.b on #  HW Monitor
 198                                                                 io 0x60 = 0x290
 199                                                                 irq 0x70 = 5
 200                                                         end
 201                                                 end
 202                                         end
 203                                         device pci 1.1 on end
 204                                         device pci 1.2 on end
 205                                         device pci 1.3 on end
 206                                         device pci 1.5 on end
 207                                         device pci 1.6 on end
 208                                 end
 209                         end # LDT1
 210                         device pci 18.0 on end # LDT2
 211                         device pci 18.1 on end
 212                         device pci 18.2 on end
 213                         device pci 18.3 on end
 214                 end
 215                 chip northbridge/amd/amdk8
 216                         device pci 19.0 on end
 217                         device pci 19.0 on end
 218                         device pci 19.0 on end
 219                         device pci 19.1 on end
 220                         device pci 19.2 on end
 221                         device pci 19.3 on end
 222                 end
 223         end
 224 end
 225