2 ## This file is part of the coreboot project.
4 ## Copyright (C) 2007 AMD
5 ## Written by Yinghai Lu <yinghailu@amd.com> for AMD.
6 ## Copyright (C) 2010 Raptor Engineering
7 ## Written by Timothy Pearson <tpearson@raptorengineeringinc.com> for Raptor Engineering.
9 ## This program is free software; you can redistribute it and/or modify
10 ## it under the terms of the GNU General Public License as published by
11 ## the Free Software Foundation; either version 2 of the License, or
12 ## (at your option) any later version.
14 ## This program is distributed in the hope that it will be useful,
15 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
16 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 ## GNU General Public License for more details.
19 ## You should have received a copy of the GNU General Public License
20 ## along with this program; if not, write to the Free Software
21 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 chip northbridge/amd/amdfam10/root_complex # Root complex
25 device lapic_cluster 0 on # (L)APIC cluster
26 chip cpu/amd/socket_F_1207 # CPU socket
27 device lapic 0 on end # Local APIC of the CPU
30 device pci_domain 0 on # PCI domain
31 subsystemid 0x1462 0x9652 inherit
32 chip northbridge/amd/amdfam10 # Northbridge / RAM controller
33 device pci 18.0 on # Link 0
34 chip southbridge/nvidia/mcp55 # Southbridge
35 device pci 0.0 on end # HT
36 device pci 1.0 on # LPC
37 chip superio/winbond/w83627ehg # Super I/O
38 device pnp 2e.0 on # Floppy
43 device pnp 2e.1 off # Parallel port
47 device pnp 2e.2 on # Com1
51 device pnp 2e.3 on # Com2
55 device pnp 2e.5 on # PS/2 keyboard & mouse
61 device pnp 2e.106 off # Serial flash interface (SFI)
64 device pnp 2e.007 off # GPIO 1
66 device pnp 2e.107 on # Game port
69 device pnp 2e.207 on # MIDI
73 device pnp 2e.307 off # GPIO 6
75 device pnp 2e.8 off # WDTO#, PLED
77 device pnp 2e.009 off # GPIO 2
79 device pnp 2e.109 off # GPIO 3
81 device pnp 2e.209 off # GPIO 4
83 device pnp 2e.309 off # GPIO 5
85 device pnp 2e.a off end # ACPI
86 device pnp 2e.b on # Hardware monitor
92 device pci 1.1 on # SM 0
93 chip drivers/generic/generic # DIMM 0-0-0
96 chip drivers/generic/generic # DIMM 0-0-1
99 chip drivers/generic/generic # DIMM 0-1-0
102 chip drivers/generic/generic # DIMM 0-1-1
105 chip drivers/generic/generic # DIMM 1-0-0
108 chip drivers/generic/generic # DIMM 1-0-1
111 chip drivers/generic/generic # DIMM 1-1-0
114 chip drivers/generic/generic # DIMM 1-1-1
118 device pci 1.1 on # SM 1
119 # PCI device SMBus address will
120 # depend on addon PCI device, do
121 # we need to scan_smbus_bus?
122 # chip drivers/generic/generic # PCIXA slot 1
123 # device i2c 50 on end
125 # chip drivers/generic/generic # PCIXB slot 1
126 # device i2c 51 on end
128 # chip drivers/generic/generic # PCIXB slot 2
129 # device i2c 52 on end
131 # chip drivers/generic/generic # PCI slot 1
132 # device i2c 53 on end
134 # chip drivers/generic/generic # Master MCP55 PCI-E
135 # device i2c 54 on end
137 # chip drivers/generic/generic # Slave MCP55 PCI-E
138 # device i2c 55 on end
140 # chip drivers/generic/generic # MAC EEPROM
141 # device i2c 51 on end
144 device pci 2.0 on end # USB 1.1
145 device pci 2.1 on end # USB 2
146 device pci 4.0 on end # IDE
147 device pci 5.0 on end # SATA 0
148 device pci 5.1 on end # SATA 1
149 device pci 5.2 on end # SATA 2
150 device pci 6.1 on end # AZA
151 device pci 8.0 on end # NIC
152 device pci 9.0 on end # NIC
153 register "ide0_enable" = "1"
154 register "sata0_enable" = "1"
155 register "sata1_enable" = "1"
156 # 1: SMBus under 2e.8, 2: SM0 3: SM1
157 register "mac_eeprom_smbus" = "3"
158 register "mac_eeprom_addr" = "0x51"
161 device pci 18.0 on end # HT 1.0
162 device pci 18.0 on end # HT 2.0
163 device pci 18.1 on end
164 device pci 18.2 on end
165 device pci 18.3 on end
166 device pci 18.4 on end
169 # chip drivers/generic/debug
170 # device pnp 0.0 off end # chip name
171 # device pnp 0.1 on end # pci_regs_all
172 # device pnp 0.2 on end # mem
173 # device pnp 0.3 off end # cpuid
174 # device pnp 0.4 on end # smbus_regs_all
175 # device pnp 0.5 off end # dual core msr
176 # device pnp 0.6 off end # cache size
177 # device pnp 0.7 off end # tsc
178 # device pnp 0.8 off end # io
179 # device pnp 0.9 off end # io