2 ## This file is part of the LinuxBIOS project.
4 ## Copyright (C) 2006 AMD
5 ## Written by Yinghai Lu <yinghailu@gmail.com> for AMD.
7 ## Copyright (C) 2006 MSI
8 ## Written by bxshi <bingxunshi@gmail.com> for MSI.
10 ## This program is free software; you can redistribute it and/or modify
11 ## it under the terms of the GNU General Public License as published by
12 ## the Free Software Foundation; either version 2 of the License, or
13 ## (at your option) any later version.
15 ## This program is distributed in the hope that it will be useful,
16 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
17 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 ## GNU General Public License for more details.
20 ## You should have received a copy of the GNU General Public License
21 ## along with this program; if not, write to the Free Software
22 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 uses USE_FALLBACK_IMAGE
30 uses HAVE_FALLBACK_BOOT
33 uses HAVE_OPTION_TABLE
35 uses CONFIG_MAX_PHYSICAL_CPUS
36 uses CONFIG_LOGICAL_CPUS
44 uses ROM_SECTION_OFFSET
45 uses CONFIG_ROM_STREAM
46 uses CONFIG_ROM_STREAM_START
54 uses LB_CKS_RANGE_START
57 uses MAINBOARD_PART_NUMBER
60 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
61 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
62 uses LINUXBIOS_EXTRA_VERSION
67 uses DEFAULT_CONSOLE_LOGLEVEL
68 uses MAXIMUM_CONSOLE_LOGLEVEL
69 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
70 uses CONFIG_CONSOLE_SERIAL8250
79 uses CONFIG_CONSOLE_VGA
80 uses CONFIG_PCI_ROM_RUN
81 uses HW_MEM_HOLE_SIZEK
82 uses HW_MEM_HOLE_SIZE_AUTO_INC
83 uses K8_HT_FREQ_1G_SUPPORT
85 uses HT_CHAIN_UNITID_BASE
86 uses HT_CHAIN_END_UNITID_BASE
87 uses SB_HT_CHAIN_ON_BUS0
88 uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
93 uses DCACHE_RAM_GLOBAL_VAR_SIZE
98 uses ENABLE_APIC_EXT_ID
100 uses LIFT_BSP_APIC_ID
102 uses CONFIG_PCI_64BIT_PREF_MEM
104 uses CONFIG_LB_MEM_TOPK
112 ## ROM_SIZE is the size of boot ROM that this board will use.
114 default ROM_SIZE=524288
117 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
119 #default FALLBACK_SIZE=131072
121 default FALLBACK_SIZE=0x40000
124 default CONFIG_LB_MEM_TOPK=2048
127 ## Build code for the fallback boot
129 default HAVE_FALLBACK_BOOT=1
132 ## Build code to reset the motherboard from linuxBIOS
134 default HAVE_HARD_RESET=1
137 ## Build code to export a programmable irq routing table
139 default HAVE_PIRQ_TABLE=1
140 default IRQ_SLOT_COUNT=11
143 ## Build code to export an x86 MP table
144 ## Useful for specifying IRQ routing values
146 default HAVE_MP_TABLE=1
148 ## ACPI tables will be included
149 #default HAVE_ACPI_TABLES=1
151 #default ACPI_SSDTX_NUM=1
154 ## Build code to export a CMOS option table
156 default HAVE_OPTION_TABLE=1
159 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
161 default LB_CKS_RANGE_START=49
162 default LB_CKS_RANGE_END=122
163 default LB_CKS_LOC=123
166 ## Build code for SMP support
167 ## Only worry about 2 micro processors
170 default CONFIG_MAX_CPUS=4
171 default CONFIG_MAX_PHYSICAL_CPUS=2
172 default CONFIG_LOGICAL_CPUS=1
174 default SERIAL_CPU_INIT=0
176 default ENABLE_APIC_EXT_ID=0
177 default APIC_ID_OFFSET=0x8
178 default LIFT_BSP_APIC_ID=1
181 default CONFIG_CHIP_NAME=1
183 #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead.
185 #default HW_MEM_HOLE_SIZEK=0x200000
187 default HW_MEM_HOLE_SIZEK=0x100000
189 #default HW_MEM_HOLE_SIZEK=0x80000
191 #make auto increase hole size to avoid hole_startk equal to basek so as to make some kernel happy
192 #default HW_MEM_HOLE_SIZE_AUTO_INC=1
194 #Opteron K8 1G HT Support
195 default K8_HT_FREQ_1G_SUPPORT=1
198 default CONFIG_CONSOLE_VGA=1
199 default CONFIG_PCI_ROM_RUN=1
201 #HT Unit ID offset, default is 1, the typical one
202 default HT_CHAIN_UNITID_BASE=0x06
204 #real SB Unit ID, default is 0x20, mean dont touch it at last
205 default HT_CHAIN_END_UNITID_BASE=0x01
207 #make the SB HT chain on bus 0, default is not (0)
208 default SB_HT_CHAIN_ON_BUS0=2
210 #only offset for SB chain?, default is yes(1)
211 #default SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
213 #allow capable device use that above 4G
214 #default CONFIG_PCI_64BIT_PREF_MEM=1
217 ## enable CACHE_AS_RAM specifics
219 default USE_DCACHE_RAM=1
220 default DCACHE_RAM_BASE=0xcc000
221 default DCACHE_RAM_SIZE=0x04000
222 default DCACHE_RAM_GLOBAL_VAR_SIZE=0x01000
223 default CONFIG_USE_INIT=0
226 ## Build code to setup a generic IOAPIC
228 default CONFIG_IOAPIC=1
231 ## Clean up the motherboard id strings
233 default MAINBOARD_PART_NUMBER="MS9185"
234 default MAINBOARD_VENDOR="MSI"
235 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1022
236 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2b80
239 ### LinuxBIOS layout values
242 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
243 default ROM_IMAGE_SIZE = 65536
246 ## Use a small 8K stack
248 default STACK_SIZE=0x2000
251 ## Use a small 32K heap
253 default HEAP_SIZE=0x8000
256 ## Only use the option table in a normal image
258 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
261 ## LinuxBIOS C code runs at this location in RAM
263 default _RAMBASE=0x00100000
266 ## Load the payload from the ROM
268 default CONFIG_ROM_STREAM = 1
271 ### Defaults of options that you may want to override in the target config file
275 ## The default compiler
277 default CC="$(CROSS_COMPILE)gcc -m32"
281 ## Disable the gdb stub by default
283 default CONFIG_GDB_STUB=0
286 ## The Serial Console
289 # To Enable the Serial Console
290 default CONFIG_CONSOLE_SERIAL8250=1
292 ## Select the serial console baud rate
293 default TTYS0_BAUD=115200
294 #default TTYS0_BAUD=57600
295 #default TTYS0_BAUD=38400
296 #default TTYS0_BAUD=19200
297 #default TTYS0_BAUD=9600
298 #default TTYS0_BAUD=4800
299 #default TTYS0_BAUD=2400
300 #default TTYS0_BAUD=1200
302 # Select the serial console base port
303 default TTYS0_BASE=0x3f8
305 # Select the serial protocol
306 # This defaults to 8 data bits, 1 stop bit, and no parity
307 default TTYS0_LCS=0x3
310 ### Select the linuxBIOS loglevel
312 ## EMERG 1 system is unusable
313 ## ALERT 2 action must be taken immediately
314 ## CRIT 3 critical conditions
315 ## ERR 4 error conditions
316 ## WARNING 5 warning conditions
317 ## NOTICE 6 normal but significant condition
318 ## INFO 7 informational
319 ## DEBUG 8 debug-level messages
320 ## SPEW 9 Way too many details
322 ## Request this level of debugging output
323 default DEFAULT_CONSOLE_LOGLEVEL=8
324 ## At a maximum only compile in this level of debugging
325 default MAXIMUM_CONSOLE_LOGLEVEL=8
328 ## Select power on after power fail setting
329 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"