src/mainboard/msi/ms9185/Config.lb

   1 ##
   2 ## This file is part of the coreboot project.
   3 ##
   4 ## Copyright (C) 2006 AMD
   5 ## Written by Yinghai Lu <yinghailu@gmail.com> for AMD.
   6 ##
   7 ## Copyright (C) 2006 MSI
   8 ## Written by bxshi <bingxunshi@gmail.com> for MSI.
   9 ##
  10 ## This program is free software; you can redistribute it and/or modify
  11 ## it under the terms of the GNU General Public License as published by
  12 ## the Free Software Foundation; either version 2 of the License, or
  13 ## (at your option) any later version.
  14 ##
  15 ## This program is distributed in the hope that it will be useful,
  16 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 ## GNU General Public License for more details.
  19 ##
  20 ## You should have received a copy of the GNU General Public License
  21 ## along with this program; if not, write to the Free Software
  22 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  23 ##
  24
  25 include /config/nofailovercalculation.lb
  26
  27 arch i386 end
  28
  29 ##
  30 ## Build the objects we have code for in this directory.
  31 ##
  32
  33 driver mainboard.o
  34
  35 #dir /drivers/si/3114
  36
  37 #needed by irq_tables and mptable and acpi_tables
  38 object get_bus_conf.o
  39
  40 if HAVE_MP_TABLE
  41        object mptable.o
  42 end
  43
  44 if HAVE_PIRQ_TABLE
  45        object irq_tables.o
  46 end
  47
  48        if CONFIG_USE_INIT
  49                # compile cache_as_ram.c to auto.o
  50                makerule ./cache_as_ram_auto.o
  51                        depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
  52                        action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c $(MAINBOARD)/cache_as_ram_auto.c -o $@"
  53                end
  54
  55        else
  56                #compile cache_as_ram.c to auto.inc
  57                makerule ./cache_as_ram_auto.inc
  58                        depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
  59                        action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c -S $(MAINBOARD)/cache_as_ram_auto.c -o $@"
  60                        action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
  61                        action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
  62                end
  63
  64        end
  65 ##
  66 ## Build our 16 bit and 32 bit coreboot entry code
  67 ##
  68
  69 if USE_FALLBACK_IMAGE
  70        mainboardinit cpu/x86/16bit/entry16.inc
  71        ldscript /cpu/x86/16bit/entry16.lds
  72 end
  73
  74 mainboardinit cpu/x86/32bit/entry32.inc
  75         if CONFIG_USE_INIT
  76                 ldscript /cpu/x86/32bit/entry32.lds
  77         end
  78
  79         if CONFIG_USE_INIT
  80                 ldscript /cpu/amd/car/cache_as_ram.lds
  81         end
  82
  83 ##
  84 ## Build our reset vector (This is where coreboot is entered)
  85 ##
  86 if USE_FALLBACK_IMAGE
  87        mainboardinit cpu/x86/16bit/reset16.inc
  88        ldscript /cpu/x86/16bit/reset16.lds
  89 else
  90        mainboardinit cpu/x86/32bit/reset32.inc
  91        ldscript /cpu/x86/32bit/reset32.lds
  92 end
  93
  94 ##
  95 ## Include an id string (For safe flashing)
  96 ##
  97 mainboardinit arch/i386/lib/id.inc
  98 ldscript /arch/i386/lib/id.lds
  99
 100        ##
 101        ## Setup Cache-As-Ram
 102        ##
 103        mainboardinit cpu/amd/car/cache_as_ram.inc
 104
 105 ###
 106 ### This is the early phase of coreboot startup
 107 ### Things are delicate and we test to see if we should
 108 ### failover to another image.
 109 ###
 110 if USE_FALLBACK_IMAGE
 111                ldscript /arch/i386/lib/failover.lds
 112 end
 113
 114 ###
 115 ### O.k. We aren't just an intermediary anymore!
 116 ###
 117
 118 ##
 119 ## Setup RAM
 120 ##
 121        if CONFIG_USE_INIT
 122                initobject cache_as_ram_auto.o
 123        else
 124                mainboardinit ./cache_as_ram_auto.inc
 125        end
 126
 127 ##
 128 ## Include the secondary Configuration files
 129 ##
 130 config chip.h
 131
 132 # sample config for amd/serengeti_cheetah
 133 chip northbridge/amd/amdk8/root_complex
 134         device apic_cluster 0 on
 135                 chip cpu/amd/socket_F
 136                         device apic 0 on end
 137                 end
 138         end
 139        device pci_domain 0 on
 140                chip northbridge/amd/amdk8
 141                        device pci 18.0 on end
 142                        device pci 18.0 on end
 143                        device pci 18.0 on #  northbridge
 144                               #  devices on link 0
 145                                 chip southbridge/broadcom/bcm5780 # HT2000
 146                                         device pci 0.0 on end   # PXB 1 0x0130
 147                                         device pci 1.0 on       # PXB 2 0x0130
 148                                                 device pci 4.0 on end # GB E 0x1668 vid = 0x14e4
 149                                                 device pci 4.1 on end # GB E 0x1669 vid = 0x14e4
 150                                         end
 151                                         device pci 2.0 on end # PCI E 1  #0x0132
 152                                        device pci 3.0 on end # PCI E 2
 153                                        device pci 4.0 on end # PCI E 3
 154                                        device pci 5.0 on end # PCI E 4
 155                                 end
 156                                 chip southbridge/broadcom/bcm5785 # HT1000
 157                                         device pci 0.0 on  # HT PXB  0x0036
 158                                                 device pci d.0 on end # PPBX 0x0104
 159                                                 device pci e.0 on end # SATA 0x024a
 160                                                 device pci e.1 on end # SATA 0x024a bx_a001
 161                                                 device pci e.2 on end # SATA 0x024a bx_a001
 162                                                 device pci e.3 on end # SATA 0x024a bx_a001
 163                                         end
 164                                         device pci 1.0 on # Legacy  pci main  0x0205
 165                                        end
 166                                         device pci 1.1 on end # IDE        0x0214
 167                                         device pci 1.2 on     # LPC        0x0234
 168                                                 chip superio/nsc/pc87417
 169                                                         device  pnp 2e.0 off  # Floppy
 170                                                                  io 0x60 = 0x3f0
 171                                                                 irq 0x70 = 6
 172                                                                 drq 0x74 = 2
 173                                                         end
 174                                                         device pnp 2e.1 off  # Parallel Port
 175                                                                  io 0x60 = 0x378
 176                                                                 irq 0x70 = 7
 177                                                         end
 178                                                         device pnp 2e.2 off # Com 2
 179                                                                  io 0x60 = 0x2f8
 180                                                                 irq 0x70 = 3
 181                                                         end
 182                                                         device pnp 2e.3 on  # Com 1
 183                                                                  io 0x60 = 0x3f8
 184                                                                 irq 0x70 = 4
 185                                                         end
 186                                                         device pnp 2e.4 off end # SWC
 187                                                         device pnp 2e.5 off end # Mouse
 188                                                         device pnp 2e.6 on  # Keyboard
 189                                                                  io 0x60 = 0x60
 190                                                                  io 0x62 = 0x64
 191                                                                 irq 0x70 = 1
 192                                                         end
 193                                                         device pnp 2e.7 off end # GPIO
 194                                                         device pnp 2e.f off end # XBUS
 195                                                         device pnp 2e.10 on #RTC
 196                                                                 io 0x60 = 0x70
 197                                                                 io 0x62 = 0x72
 198                                                        end
 199                                                 end
 200                                         end
 201                                         device pci 1.3 on end # WDTimer    0x0238
 202                                         device pci 1.4 on end # XIOAPIC0   0x0235
 203                                         device pci 1.5 on end # XIOAPIC1
 204                                         device pci 1.6 on end # XIOAPIC2
 205                                         device pci 2.0 on end # USB        0x0223
 206                                         device pci 2.1 on end # USB
 207                                         device pci 2.2 on end # USB
 208                                         #when HT_CHAIN_END_UNITID_BASE (0,1) < HT_CHAIN_UNITID_BASE (6,,,,),
 209                                         chip drivers/pci/onboard
 210                                               device pci 3.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address
 211                                                                     # if HT_CHAIN_END_UNITID_BASE=0, it is 4, if HT_CHAIN_END_UNITID_BASE=1, it is 3
 212                                               register "rom_address" = "0xfff80000"
 213                                         end
 214                                        #bx_a013+ start
 215                                        #chip drivers/pci/onboard    #SATA2
 216                                        #       device pci 5.0 on end
 217                                        #       device pci 5.1 on end
 218                                        #       device pci 5.2 on end
 219                                        #       device pci 5.3 on end
 220                                        #end
 221                                        #bx_a013+ end
 222
 223                                 end
 224                                         #when HT_CHAIN_END_UNITID_BASE > HT_CHAIN_UNITID_BASE (6, ,,,,)
 225 #                                        chip drivers/pci/onboard
 226 #                                              device pci 0.0 on end # fake, will be disabled
 227 #                                        end
 228 #                                        chip drivers/pci/onboard
 229 #                                              device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed
 230 #                                              register "rom_address" = "0xfff80000"
 231 #                                        end
 232
 233                        end #  device pci 18.0
 234                        device pci 18.1 on end
 235                        device pci 18.2 on end
 236                        device pci 18.3 on end
 237                end # amdk8
 238        end #pci_domain
 239 #        chip drivers/generic/debug
 240 #              device pnp 0.0 off end # chip name
 241 #                device pnp 0.1 on end # pci_regs_all
 242 #                device pnp 0.2 off end # mem
 243 #                device pnp 0.3 off end # cpuid
 244 #                device pnp 0.4 off end # smbus_regs_all
 245 #                device pnp 0.5 off end # dual core msr
 246 #                device pnp 0.6 off end # cache size
 247 #                device pnp 0.7 off end # tsc
 248 #       end
 249
 250 end
 251
 252