2 * This file is part of the coreboot project.
4 * Copyright (C) 2007-2009 coresystems GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
23 #include <console/console.h>
25 #include <arch/ioapic.h>
26 #include <arch/acpi.h>
27 #include <arch/acpigen.h>
28 #include <arch/smp/mpspec.h>
29 #include <device/device.h>
30 #include <device/pci.h>
31 #include <device/pci_ids.h>
34 extern const unsigned char AmlCode[];
35 #if CONFIG_HAVE_ACPI_SLIC
36 unsigned long acpi_create_slic(unsigned long current);
41 static void acpi_create_gnvs(global_nvs_t *gnvs)
43 memset (gnvs, 0, sizeof(global_nvs_t));
79 gnvs->DID1 = 0x80000100;
80 gnvs->DID2 = 0x80000240;
81 gnvs->DID3 = 0x80000410;
82 gnvs->DID4 = 0x80000410;
83 gnvs->DID5 = 0x00000005;
89 // tolud = pci_read_config32(dev_find_slot(0, PCI_DEVFN(2, 0)), 0x5c);
90 // oemb->topm = tolud;
94 #include "southbridge/intel/i82801gx/nvs.h"
95 static void acpi_create_gnvs(global_nvs_t *gnvs)
97 memset((void *)gnvs, 0, sizeof(*gnvs));
99 gnvs->mpen = 1; /* Enable Multi Processing */
101 /* Enable both COM ports */
107 gnvs->did[0] = 0x80000100;
108 gnvs->did[1] = 0x80000240;
109 gnvs->did[2] = 0x80000410;
110 gnvs->did[3] = 0x80000410;
111 gnvs->did[4] = 0x00000005;
114 static void acpi_create_intel_hpet(acpi_hpet_t * hpet)
116 #define HPET_ADDR 0xfed00000ULL
117 acpi_header_t *header = &(hpet->header);
118 acpi_addr_t *addr = &(hpet->addr);
120 memset((void *) hpet, 0, sizeof(acpi_hpet_t));
122 /* fill out header fields */
123 memcpy(header->signature, "HPET", 4);
124 memcpy(header->oem_id, OEM_ID, 6);
125 memcpy(header->oem_table_id, "COREBOOT", 8);
126 memcpy(header->asl_compiler_id, ASLC, 4);
128 header->length = sizeof(acpi_hpet_t);
129 header->revision = 1;
131 /* fill out HPET address */
132 addr->space_id = 0; /* Memory */
133 addr->bit_width = 64;
134 addr->bit_offset = 0;
135 addr->addrl = HPET_ADDR & 0xffffffff;
136 addr->addrh = HPET_ADDR >> 32;
138 hpet->id = 0x8086a201; /* Intel */
140 hpet->min_tick = 0x0080;
143 acpi_checksum((void *) hpet, sizeof(acpi_hpet_t));
146 unsigned long acpi_fill_madt(unsigned long current)
149 current = acpi_create_madt_lapics(current);
152 current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
156 current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)
158 MP_IRQ_POLARITY_HIGH |
159 MP_IRQ_TRIGGER_EDGE, 0x01);
160 current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)
161 current, 1, MP_IRQ_POLARITY_HIGH |
162 MP_IRQ_TRIGGER_EDGE, 0x01);
165 current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
166 current, 0, 0, 2, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_EDGE);
167 current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
168 current, 0, 9, 9, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_LEVEL);
174 unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id)
176 generate_cpu_entries();
177 return (unsigned long) (acpigen_get_current());
180 unsigned long acpi_fill_slit(unsigned long current)
186 unsigned long acpi_fill_srat(unsigned long current)
188 /* No NUMA, no SRAT */
192 void smm_setup_structures(void *gnvs, void *tcg, void *smi1);
194 #define ALIGN_CURRENT current = ((current + 0x0f) & -0x10)
195 unsigned long write_acpi_tables(unsigned long start)
197 unsigned long current;
207 #if CONFIG_HAVE_ACPI_SLIC
216 /* Align ACPI tables to 16byte */
219 printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start);
221 /* We need at least an RSDP and an RSDT Table */
222 rsdp = (acpi_rsdp_t *) current;
223 current += sizeof(acpi_rsdp_t);
225 rsdt = (acpi_rsdt_t *) current;
226 current += sizeof(acpi_rsdt_t);
228 xsdt = (acpi_xsdt_t *) current;
229 current += sizeof(acpi_xsdt_t);
232 /* clear all table memory */
233 memset((void *) start, 0, current - start);
235 acpi_write_rsdp(rsdp, rsdt, xsdt);
236 acpi_write_rsdt(rsdt);
237 acpi_write_xsdt(xsdt);
240 * We explicitly add these tables later on:
242 printk(BIOS_DEBUG, "ACPI: * HPET\n");
244 hpet = (acpi_hpet_t *) current;
245 current += sizeof(acpi_hpet_t);
247 acpi_create_intel_hpet(hpet);
248 acpi_add_table(rsdp, hpet);
250 /* If we want to use HPET Timers Linux wants an MADT */
251 printk(BIOS_DEBUG, "ACPI: * MADT\n");
253 madt = (acpi_madt_t *) current;
254 acpi_create_madt(madt);
255 current += madt->header.length;
257 acpi_add_table(rsdp, madt);
259 printk(BIOS_DEBUG, "ACPI: * MCFG\n");
260 mcfg = (acpi_mcfg_t *) current;
261 acpi_create_mcfg(mcfg);
262 current += mcfg->header.length;
264 acpi_add_table(rsdp, mcfg);
266 printk(BIOS_DEBUG, "ACPI: * FACS\n");
267 facs = (acpi_facs_t *) current;
268 current += sizeof(acpi_facs_t);
270 acpi_create_facs(facs);
272 dsdt = (acpi_header_t *) current;
273 memcpy(dsdt, &AmlCode, sizeof(acpi_header_t));
274 current += dsdt->length;
275 memcpy(dsdt, &AmlCode, dsdt->length);
277 /* Fix up global NVS region for SMI handler. The GNVS region lives
278 * in the (high) table area. The low memory map looks like this:
280 * 0x00000000 - 0x000003ff Real Mode IVT
281 * 0x00000020 - 0x0000019c Low MP Table (XXX conflict?)
282 * 0x00000400 - 0x000004ff BDA (somewhat unused)
283 * 0x00000500 - 0x0000052f Moved GDT
284 * 0x00000530 - 0x00000b64 coreboot table
285 * 0x0007c000 - 0x0007dfff OS boot sector (unused?)
286 * 0x0007e000 - 0x0007ffff free to use (so no good for acpi+smi)
287 * 0x00080000 - 0x0009fbff usable ram
288 * 0x0009fc00 - 0x0009ffff EBDA (unused?)
289 * 0x000a0000 - 0x000bffff VGA memory
290 * 0x000c0000 - 0x000cffff VGA option rom
291 * 0x000d0000 - 0x000dffff free for other option roms?
292 * 0x000e0000 - 0x000fffff SeaBIOS? (conflict with low tables:)
293 * 0x000f0000 - 0x000f03ff PIRQ table
294 * 0x000f0400 - 0x000f66?? ACPI tables
295 * 0x000f66?? - 0x000f???? DMI tables
300 /* Pack GNVS into the ACPI table area */
301 for (i=0; i < dsdt->length; i++) {
302 if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) {
303 printk(BIOS_DEBUG, "ACPI: Patching up global NVS in DSDT at offset 0x%04x -> 0x%08x\n", i, (u32)current);
304 *(u32*)(((u32)dsdt) + i) = current; // 0x92 bytes
310 acpi_create_gnvs((global_nvs_t *)current);
312 /* Keep pointer around */
313 gnvs = (void *)current;
318 /* And tell SMI about it */
319 smm_setup_structures(gnvs, NULL, NULL);
321 /* We patched up the DSDT, so we need to recalculate the checksum */
323 dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length);
325 printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x\n", dsdt,
328 #if CONFIG_HAVE_ACPI_SLIC
329 printk(BIOS_DEBUG, "ACPI: * SLIC\n");
330 slic = (acpi_header_t *)current;
331 current += acpi_create_slic(current);
333 acpi_add_table(rsdp, slic);
336 printk(BIOS_DEBUG, "ACPI: * FADT\n");
337 fadt = (acpi_fadt_t *) current;
338 current += sizeof(acpi_fadt_t);
341 acpi_create_fadt(fadt, facs, dsdt);
342 acpi_add_table(rsdp, fadt);
344 printk(BIOS_DEBUG, "ACPI: * SSDT\n");
345 ssdt = (acpi_header_t *)current;
346 acpi_create_ssdt_generator(ssdt, "COREBOOT");
347 current += ssdt->length;
348 acpi_add_table(rsdp, ssdt);
351 printk(BIOS_DEBUG, "current = %lx\n", current);
353 printk(BIOS_DEBUG, "ACPI: * DMI (Linux workaround)\n");
354 memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE);
355 #if CONFIG_WRITE_HIGH_TABLES == 1
356 memcpy((void *)current, dmi_table, DMI_TABLE_SIZE);
357 current += DMI_TABLE_SIZE;
361 printk(BIOS_INFO, "ACPI: done.\n");
363 /* Enable Dummy DCC ON# for DVI */
364 printk(BIOS_DEBUG, "Laptop handling...\n");
365 outb(inb(0x60f) & ~(1 << 5), 0x60f);