2 ## This file is part of the coreboot project.
4 ## Copyright (C) 2008 VIA Technologies, Inc.
5 ## (Written by Aaron Lwe <aaron.lwe@gmail.com> for VIA)
7 ## This program is free software; you can redistribute it and/or modify
8 ## it under the terms of the GNU General Public License as published by
9 ## the Free Software Foundation; either version 2 of the License, or
10 ## (at your option) any later version.
12 ## This program is distributed in the hope that it will be useful,
13 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
14 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 ## GNU General Public License for more details.
17 ## You should have received a copy of the GNU General Public License
18 ## along with this program; if not, write to the Free Software
19 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 default ROM_SECTION_SIZE = FALLBACK_SIZE
24 default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
26 default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
27 default ROM_SECTION_OFFSET = 0
29 default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
30 default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
31 default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
32 default XIP_ROM_SIZE = 64 * 1024
33 default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
36 if HAVE_PIRQ_TABLE object irq_tables.o end
37 if HAVE_MP_TABLE object mptable.o end
44 depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
45 action "../romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
47 makerule ./failover.inc
48 depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
49 action "../romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
52 depends "$(MAINBOARD)/auto.c option_table.h ../romcc"
53 action "../romcc -E -mcpu=c3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
56 depends "$(MAINBOARD)/auto.c option_table.h ../romcc"
57 action "../romcc -mcpu=c3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
59 mainboardinit cpu/x86/16bit/entry16.inc
60 mainboardinit cpu/x86/32bit/entry32.inc
61 ldscript /cpu/x86/16bit/entry16.lds
62 ldscript /cpu/x86/32bit/entry32.lds
64 mainboardinit cpu/x86/16bit/reset16.inc
65 ldscript /cpu/x86/16bit/reset16.lds
67 mainboardinit cpu/x86/32bit/reset32.inc
68 ldscript /cpu/x86/32bit/reset32.lds
70 mainboardinit arch/i386/lib/cpu_reset.inc
71 mainboardinit arch/i386/lib/id.inc
72 ldscript /arch/i386/lib/id.lds
74 ldscript /arch/i386/lib/failover.lds
75 mainboardinit ./failover.inc
77 mainboardinit cpu/x86/fpu/enable_fpu.inc
78 mainboardinit cpu/x86/mmx/enable_mmx.inc
79 mainboardinit ./auto.inc
80 mainboardinit cpu/x86/mmx/disable_mmx.inc
84 chip northbridge/via/cn700 # Northbridge
85 device pci_domain 0 on # PCI domain
86 device pci 0.0 on end # AGP Bridge
87 device pci 0.1 on end # Error Reporting
88 device pci 0.2 on end # Host Bus Control
89 device pci 0.3 on end # Memory Controller
90 device pci 0.4 on end # Power Management
91 device pci 0.7 on end # V-Link Controller
92 device pci 1.0 on end # PCI Bridge
93 chip southbridge/via/vt8237r # Southbridge
94 # Enable both IDE channels.
95 register "ide0_enable" = "1"
96 register "ide1_enable" = "1"
97 # Both cables are 40pin.
98 register "ide0_80pin_cable" = "0"
99 register "ide1_80pin_cable" = "0"
100 register "fn_ctrl_lo" = "0x80"
101 register "fn_ctrl_hi" = "0x1d"
102 device pci a.0 on end # Firewire
103 device pci f.0 on end # SATA
104 device pci f.1 on end # IDE
105 device pci 10.0 on end # OHCI
106 device pci 10.1 on end # OHCI
107 device pci 10.2 on end # OHCI
108 device pci 10.3 on end # OHCI
109 device pci 10.4 on end # EHCI
110 device pci 11.0 on # Southbridge LPC
111 chip superio/fintek/f71805f # Super I/O
112 device pnp 2e.0 off # Floppy
117 device pnp 2e.1 on # Parallel Port
122 device pnp 2e.2 on # COM1
126 device pnp 2e.3 on # COM2
130 device pnp 2e.b on # HWM
135 device pci 11.5 on end # AC'97 audio
136 # device pci 11.6 off end # AC'97 Modem
137 device pci 12.0 on end # Ethernet
140 device apic_cluster 0 on # APIC cluster
141 chip cpu/via/model_c7 # VIA C7
142 device apic 0 on end # APIC