3 #include <device/pci_def.h>
4 #include <device/pci_ids.h>
6 #include <arch/romcc_io.h>
7 #include <cpu/x86/lapic.h>
8 #include "pc80/mc146818rtc_early.c"
9 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
10 #include "northbridge/amd/amdk8/early_ht.c"
11 #include "cpu/x86/lapic/boot_cpu.c"
12 #include "cpu/x86/mtrr/earlymtrr.c"
13 #include "northbridge/amd/amdk8/reset_test.c"
15 static unsigned long main(unsigned long bist)
19 /* Make cerain my local apic is useable */
22 /* Is this a cpu only reset? */
23 if (early_mtrr_init_detected()) {
24 if (last_boot_normal()) {
30 /* Is this a secondary cpu? */
32 if (last_boot_normal()) {
40 /* Nothing special needs to be done to find bus 0 */
41 /* Allow the HT devices to be found */
47 /* Is this a deliberate reset by the bios */
48 if (bios_reset_detected() && last_boot_normal()) {
51 /* This is the primary cpu how should I boot? */
52 else if (do_normal_boot()) {
59 asm volatile ("jmp __normal_image"
61 : "a" (bist) /* inputs */