Remove redundant HW_MEM_HOLE_SIZEK and HW_MEM_HOLE_SIZE_AUTO_INC settings.
[coreboot.git] / src / mainboard / iwill / dk8x / Kconfig
1 if BOARD_IWILL_DK8X
2
3 config BOARD_SPECIFIC_OPTIONS # dummy
4         def_bool y
5         select ARCH_X86
6         select CPU_AMD_SOCKET_940
7         select NORTHBRIDGE_AMD_AMDK8
8         select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
9         select SOUTHBRIDGE_AMD_AMD8111
10         select SOUTHBRIDGE_AMD_AMD8131
11         select SUPERIO_WINBOND_W83627THF
12         select HAVE_OPTION_TABLE
13         select HAVE_PIRQ_TABLE
14         select HAVE_MP_TABLE
15         select CACHE_AS_RAM
16         select HAVE_HARD_RESET
17         select SB_HT_CHAIN_UNITID_OFFSET_ONLY
18         select WAIT_BEFORE_CPUS_INIT
19         select BOARD_ROMSIZE_KB_512
20
21 config MAINBOARD_DIR
22         string
23         default iwill/dk8x
24
25 config DCACHE_RAM_BASE
26         hex
27         default 0xc8000
28
29 config DCACHE_RAM_SIZE
30         hex
31         default 0x08000
32
33 config DCACHE_RAM_GLOBAL_VAR_SIZE
34         hex
35         default 0x01000
36
37 config APIC_ID_OFFSET
38         hex
39         default 0x0
40
41 config MAINBOARD_PART_NUMBER
42         string
43         default "DK8X"
44
45 config MAX_CPUS
46         int
47         default 2
48
49 config MAX_PHYSICAL_CPUS
50         int
51         default 2
52
53 config SB_HT_CHAIN_ON_BUS0
54         int
55         default 0
56
57 config HT_CHAIN_END_UNITID_BASE
58         hex
59         default 0x20
60
61 config HT_CHAIN_UNITID_BASE
62         hex
63         default 0x1
64
65 config SERIAL_CPU_INIT
66         bool
67         default n
68
69 config IRQ_SLOT_COUNT
70         int
71         default 9
72
73 endif # BOARD_IWILL_DK8X