3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
9 uses CONFIG_MAX_PHYSICAL_CPUS
17 uses ROM_SECTION_OFFSET
18 uses CONFIG_ROM_PAYLOAD
19 uses CONFIG_ROM_PAYLOAD_START
20 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
28 uses LB_CKS_RANGE_START
32 uses MAINBOARD_PART_NUMBER
34 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
35 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
36 uses LINUXBIOS_EXTRA_VERSION
41 uses DEFAULT_CONSOLE_LOGLEVEL
42 uses MAXIMUM_CONSOLE_LOGLEVEL
43 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
44 uses CONFIG_CONSOLE_SERIAL8250
54 ## ROM_SIZE is the size of boot ROM that this board will use.
55 default ROM_SIZE=524288
62 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
64 default FALLBACK_SIZE=0x40000
67 ## Build code for the fallback boot
69 default HAVE_FALLBACK_BOOT=1
72 ## Build code to reset the motherboard from linuxBIOS
74 default HAVE_HARD_RESET=1
77 ## Build code to export a programmable irq routing table
79 default HAVE_PIRQ_TABLE=1
80 default IRQ_SLOT_COUNT=9
83 ## Build code to export an x86 MP table
84 ## Useful for specifying IRQ routing values
86 default HAVE_MP_TABLE=1
89 ## Build code to export a CMOS option table
91 default HAVE_OPTION_TABLE=1
94 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
96 default LB_CKS_RANGE_START=49
97 default LB_CKS_RANGE_END=122
98 default LB_CKS_LOC=123
101 ## Build code for SMP support
102 ## Only worry about 2 micro processors
105 default CONFIG_MAX_CPUS=2
106 default CONFIG_MAX_PHYSICAL_CPUS=2
109 ## Build code to setup a generic IOAPIC
111 default CONFIG_IOAPIC=1
114 ## Clean up the motherboard id strings
116 default MAINBOARD_PART_NUMBER="HDAMA"
117 default MAINBOARD_VENDOR="ARIMA"
118 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x161f
119 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x3016
123 ### LinuxBIOS layout values
126 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
127 default ROM_IMAGE_SIZE = 65536
130 ## Use a small 8K stack
132 default STACK_SIZE=0x2000
135 ## Use a small 16K heap
137 default HEAP_SIZE=0x4000
140 ## Only use the option table in a normal image
142 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
145 ## LinuxBIOS C code runs at this location in RAM
147 default _RAMBASE=0x00004000
150 ## Load the payload from the ROM
152 default CONFIG_ROM_PAYLOAD = 1
155 ### Defaults of options that you may want to override in the target config file
159 ## The default compiler
161 #default CC="$(CROSS_COMPILE)gcc -m32"
162 #default HOSTCC="gcc"
165 ## Disable the gdb stub by default
167 default CONFIG_GDB_STUB=0
170 ## The Serial Console
173 # To Enable the Serial Console
174 default CONFIG_CONSOLE_SERIAL8250=1
176 ## Select the serial console baud rate
177 default TTYS0_BAUD=115200
178 #default TTYS0_BAUD=57600
179 #default TTYS0_BAUD=38400
180 #default TTYS0_BAUD=19200
181 #default TTYS0_BAUD=9600
182 #default TTYS0_BAUD=4800
183 #default TTYS0_BAUD=2400
184 #default TTYS0_BAUD=1200
186 # Select the serial console base port
187 default TTYS0_BASE=0x3f8
189 # Select the serial protocol
190 # This defaults to 8 data bits, 1 stop bit, and no parity
191 default TTYS0_LCS=0x3
194 ### Select the linuxBIOS loglevel
196 ## EMERG 1 system is unusable
197 ## ALERT 2 action must be taken immediately
198 ## CRIT 3 critical conditions
199 ## ERR 4 error conditions
200 ## WARNING 5 warning conditions
201 ## NOTICE 6 normal but significant condition
202 ## INFO 7 informational
203 ## DEBUG 8 debug-level messages
204 ## SPEW 9 Way too many details
206 ## Request this level of debugging output
207 default DEFAULT_CONSOLE_LOGLEVEL=8
208 ## At a maximum only compile in this level of debugging
209 default MAXIMUM_CONSOLE_LOGLEVEL=8
212 ## Select power on after power fail setting
213 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"