1 #include <console/console.h>
2 #include <device/pci.h>
3 #include <device/pci_ids.h>
6 #if CONFIG_LOGICAL_CPUS==1
7 #include <cpu/amd/dualcore.h>
10 #include <cpu/amd/amdk8_sysconf.h>
12 #include "mb_sysconf.h"
14 // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
15 struct mb_sysconf_t mb_sysconf;
17 static unsigned pci1234x[] =
18 { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
19 //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
20 0x0000ff0, // SB chain m
22 0x0000100, // co processor on socket 1
29 static unsigned hcdnx[] =
30 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
41 extern void get_sblk_pci1234(void);
43 static unsigned get_bus_conf_done = 0;
45 static unsigned get_hcid(unsigned i)
49 unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
51 unsigned devn = sysconf.hcdn[i] & 0xff;
55 dev = dev_find_slot(busn, PCI_DEVFN(devn,0));
57 switch (dev->device) {
69 // we may need more way to find out hcid: subsystem id? GPIO read ?
71 // we need use id for 1. bus num, 2. mptable, 3. acpi table
76 void get_bus_conf(void)
83 struct mb_sysconf_t *m;
85 if(get_bus_conf_done == 1) return; //do it only once
87 get_bus_conf_done = 1;
89 sysconf.mb = &mb_sysconf;
93 sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]);
94 for(i=0;i<sysconf.hc_possible_num; i++) {
95 sysconf.pci1234[i] = pci1234x[i];
96 sysconf.hcdn[i] = hcdnx[i];
101 sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
102 m->sbdn3 = sysconf.hcdn[0] & 0xff;
104 m->bus_8132_0 = (sysconf.pci1234[0] >> 16) & 0xff;
105 m->bus_8111_0 = m->bus_8132_0;
108 dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn,0));
110 m->bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
111 #if HT_CHAIN_END_UNITID_BASE >= HT_CHAIN_UNITID_BASE
112 m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
114 // printk_debug("bus_isa=%d\n",bus_isa);
118 printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8111_0, sysconf.sbdn);
122 dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3,0));
124 m->bus_8132_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
127 printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8132_0, m->sbdn3);
131 dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3+1,0));
133 m->bus_8132_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
134 #if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE
135 m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
137 // printk_debug("bus_isa=%d\n",bus_isa);
141 printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8132_0, m->sbdn3+1);
146 for(i=1; i< sysconf.hc_possible_num; i++) {
147 if(!(sysconf.pci1234[i] & 0x1) ) continue;
149 // check hcid type here
150 sysconf.hcid[i] = get_hcid(i);
152 switch(sysconf.hcid[i]) {
157 m->bus_8132a[j][0] = (sysconf.pci1234[i] >> 16) & 0xff;
159 m->sbdn3a[j] = sysconf.hcdn[i] & 0xff;
162 dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j],0));
164 m->bus_8132a[j][1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
167 printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8132a[j][0], m->sbdn3a[j]);
171 dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1,0));
173 m->bus_8132a[j][2] = pci_read_config8(dev, PCI_SECONDARY_BUS);
174 m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
176 // printk_debug("bus_isa=%d\n",bus_isa);
179 printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8132a[j][0], m->sbdn3a[j]+1);
186 m->bus_8151[j][0] = (sysconf.pci1234[i] >> 16) & 0xff;
187 m->sbdn5[j] = sysconf.hcdn[i] & 0xff;
189 dev = dev_find_slot(m->bus_8151[j][0], PCI_DEVFN(m->sbdn5[j]+1, 0));
192 m->bus_8151[j][1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
193 // printk_debug("bus_8151_1=%d\n",bus_8151[j][1]);
194 m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
198 printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8151[j][0], m->sbdn5[j]+1);
208 /*I/O APICs: APIC ID Version State Address*/
209 #if CONFIG_LOGICAL_CPUS==1
210 apicid_base = get_apicid_base(3);
212 apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
214 m->apicid_8111 = apicid_base+0;
215 m->apicid_8132_1 = apicid_base+1;
216 m->apicid_8132_2 = apicid_base+2;
218 m->apicid_8132a[i][0] = apicid_base + 3 + i*2;
219 m->apicid_8132a[i][1] = apicid_base + 3 + i*2 + 1;