1 uses CONFIG_HAVE_MP_TABLE
3 uses CONFIG_HAVE_PIRQ_TABLE
4 uses CONFIG_HAVE_ACPI_TABLES
5 uses CONFIG_HAVE_ACPI_RESUME
6 uses CONFIG_ACPI_SSDTX_NUM
7 uses CONFIG_USE_FALLBACK_IMAGE
8 uses CONFIG_USE_FAILOVER_IMAGE
9 uses CONFIG_HAVE_FALLBACK_BOOT
10 uses CONFIG_HAVE_FAILOVER_BOOT
11 uses CONFIG_HAVE_HARD_RESET
12 uses CONFIG_IRQ_SLOT_COUNT
13 uses CONFIG_HAVE_OPTION_TABLE
15 uses CONFIG_MAX_PHYSICAL_CPUS
16 uses CONFIG_LOGICAL_CPUS
19 uses CONFIG_FALLBACK_SIZE
20 uses CONFIG_FAILOVER_SIZE
22 uses CONFIG_ROM_SECTION_SIZE
23 uses CONFIG_ROM_IMAGE_SIZE
24 uses CONFIG_ROM_SECTION_SIZE
25 uses CONFIG_ROM_SECTION_OFFSET
26 uses CONFIG_ROM_PAYLOAD
27 uses CONFIG_ROM_PAYLOAD_START
28 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
29 uses CONFIG_PRECOMPRESSED_PAYLOAD
30 uses CONFIG_PAYLOAD_SIZE
32 uses CONFIG_XIP_ROM_SIZE
33 uses CONFIG_XIP_ROM_BASE
34 uses CONFIG_STACK_SIZE
36 uses CONFIG_USE_OPTION_TABLE
37 uses CONFIG_LB_CKS_RANGE_START
38 uses CONFIG_LB_CKS_RANGE_END
39 uses CONFIG_LB_CKS_LOC
40 uses CONFIG_MAINBOARD_PART_NUMBER
41 uses CONFIG_MAINBOARD_VENDOR
43 uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
44 uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
45 uses COREBOOT_EXTRA_VERSION
47 uses CONFIG_TTYS0_BAUD
48 uses CONFIG_TTYS0_BASE
50 uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
51 uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
52 uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
53 uses CONFIG_CONSOLE_SERIAL8250
54 uses CONFIG_HAVE_INIT_TIMER
57 uses CONFIG_CROSS_COMPILE
61 uses CONFIG_CONSOLE_VGA
62 uses CONFIG_PCI_ROM_RUN
63 uses CONFIG_HW_MEM_HOLE_SIZEK
64 uses CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC
65 uses CONFIG_K8_HT_FREQ_1G_SUPPORT
67 uses CONFIG_HT_CHAIN_UNITID_BASE
68 uses CONFIG_HT_CHAIN_END_UNITID_BASE
69 uses CONFIG_SB_HT_CHAIN_ON_BUS0
70 uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
72 uses CONFIG_USE_DCACHE_RAM
73 uses CONFIG_DCACHE_RAM_BASE
74 uses CONFIG_DCACHE_RAM_SIZE
75 uses CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE
78 uses CONFIG_SERIAL_CPU_INIT
80 uses CONFIG_ENABLE_APIC_EXT_ID
81 uses CONFIG_APIC_ID_OFFSET
82 uses CONFIG_LIFT_BSP_APIC_ID
84 uses CONFIG_PCI_64BIT_PREF_MEM
86 uses CONFIG_LB_MEM_TOPK
88 uses CONFIG_AP_CODE_IN_CAR
90 uses CONFIG_MEM_TRAIN_SEQ
92 uses CONFIG_WAIT_BEFORE_CPUS_INIT
94 uses CONFIG_USE_PRINTK_IN_CAR
101 ## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
103 default CONFIG_ROM_SIZE=524288
106 ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
110 default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
112 default CONFIG_FAILOVER_SIZE=0x02000
115 default CONFIG_LB_MEM_TOPK=2048
118 ## Build code for the fallback boot
120 default CONFIG_HAVE_FALLBACK_BOOT=1
121 default CONFIG_HAVE_FAILOVER_BOOT=1
124 ## Build code to reset the motherboard from coreboot
126 default CONFIG_HAVE_HARD_RESET=1
129 ## Build code to export a programmable irq routing table
131 default CONFIG_HAVE_PIRQ_TABLE=1
132 default CONFIG_IRQ_SLOT_COUNT=11
135 ## Build code to export an x86 MP table
136 ## Useful for specifying IRQ routing values
138 default CONFIG_HAVE_MP_TABLE=1
140 ## ACPI tables will be included
141 default CONFIG_HAVE_ACPI_TABLES=1
143 default CONFIG_ACPI_SSDTX_NUM=3
146 ## Build code to export a CMOS option table
148 default CONFIG_HAVE_OPTION_TABLE=1
151 ## Move the default coreboot cmos range off of AMD RTC registers
153 default CONFIG_LB_CKS_RANGE_START=49
154 default CONFIG_LB_CKS_RANGE_END=122
155 default CONFIG_LB_CKS_LOC=123
158 ## Build code for SMP support
159 ## Only worry about 2 micro processors
162 default CONFIG_MAX_CPUS=4
163 default CONFIG_MAX_PHYSICAL_CPUS=2
164 default CONFIG_LOGICAL_CPUS=1
166 default CONFIG_SERIAL_CPU_INIT=0
168 default CONFIG_ENABLE_APIC_EXT_ID=0
169 default CONFIG_APIC_ID_OFFSET=0x10
170 default CONFIG_LIFT_BSP_APIC_ID=1
172 #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead.
174 #default CONFIG_HW_MEM_HOLE_SIZEK=0x200000
176 #default CONFIG_HW_MEM_HOLE_SIZEK=0x100000
178 default CONFIG_HW_MEM_HOLE_SIZEK=0x80000
180 #make auto increase hole size to avoid hole_startk equal to basek so as to make some kernel happy
181 #default CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC=1
183 #Opteron K8 1G HT Support
184 default CONFIG_K8_HT_FREQ_1G_SUPPORT=1
187 default CONFIG_CONSOLE_VGA=1
188 default CONFIG_PCI_ROM_RUN=1
190 #HT Unit ID offset, default is 1, the typical one
191 default CONFIG_HT_CHAIN_UNITID_BASE=0xa
193 #real SB Unit ID, default is 0x20, mean dont touch it at last
194 default CONFIG_HT_CHAIN_END_UNITID_BASE=0x6
196 #make the SB HT chain on bus 0, default is not (0)
197 default CONFIG_SB_HT_CHAIN_ON_BUS0=2
199 #only offset for SB chain?, default is yes(1)
200 #default CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
202 #allow capable device use that above 4G
203 #default CONFIG_PCI_64BIT_PREF_MEM=1
206 ## enable CACHE_AS_RAM specifics
208 default CONFIG_USE_DCACHE_RAM=1
209 default CONFIG_DCACHE_RAM_BASE=0xc4000
210 default CONFIG_DCACHE_RAM_SIZE=0x0c000
211 default CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE=0x01000
212 default CONFIG_USE_INIT=0
215 ## for rev F training on AP purpose
217 #default CONFIG_AP_CODE_IN_CAR=1
218 #default CONFIG_MEM_TRAIN_SEQ=1
219 #default CONFIG_WAIT_BEFORE_CPUS_INIT=1
222 ## Build code to setup a generic IOAPIC
224 default CONFIG_IOAPIC=1
227 ## Clean up the motherboard id strings
229 default CONFIG_MAINBOARD_PART_NUMBER="dk8_htx"
230 default CONFIG_MAINBOARD_VENDOR="IWILL"
231 default CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1022
232 default CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2b80
235 ### coreboot layout values
238 ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
239 default CONFIG_ROM_IMAGE_SIZE = 65536 - CONFIG_FAILOVER_SIZE
242 ## Use a small 8K stack
244 default CONFIG_STACK_SIZE=0x2000
247 ## Use a small 32K heap
249 default CONFIG_HEAP_SIZE=0x8000
252 ## Only use the option table in a normal image
254 default CONFIG_USE_OPTION_TABLE = (!CONFIG_USE_FALLBACK_IMAGE) && (!CONFIG_USE_FAILOVER_IMAGE )
257 ## Coreboot C code runs at this location in RAM
259 default CONFIG_RAMBASE=0x00100000
262 ## Load the payload from the ROM
264 default CONFIG_ROM_PAYLOAD = 1
267 ### Defaults of options that you may want to override in the target config file
271 ## The default compiler
273 default CC="$(CONFIG_CROSS_COMPILE)gcc -m32"
277 ## Disable the gdb stub by default
279 default CONFIG_GDB_STUB=0
282 ## The Serial Console
284 default CONFIG_USE_PRINTK_IN_CAR=1
286 # To Enable the Serial Console
287 default CONFIG_CONSOLE_SERIAL8250=1
289 ## Select the serial console baud rate
290 default CONFIG_TTYS0_BAUD=115200
291 #default CONFIG_TTYS0_BAUD=57600
292 #default CONFIG_TTYS0_BAUD=38400
293 #default CONFIG_TTYS0_BAUD=19200
294 #default CONFIG_TTYS0_BAUD=9600
295 #default CONFIG_TTYS0_BAUD=4800
296 #default CONFIG_TTYS0_BAUD=2400
297 #default CONFIG_TTYS0_BAUD=1200
299 # Select the serial console base port
300 default CONFIG_TTYS0_BASE=0x3f8
302 # Select the serial protocol
303 # This defaults to 8 data bits, 1 stop bit, and no parity
304 default CONFIG_TTYS0_LCS=0x3
307 ### Select the coreboot loglevel
309 ## EMERG 1 system is unusable
310 ## ALERT 2 action must be taken immediately
311 ## CRIT 3 critical conditions
312 ## ERR 4 error conditions
313 ## WARNING 5 warning conditions
314 ## NOTICE 6 normal but significant condition
315 ## INFO 7 informational
316 ## CONFIG_DEBUG 8 debug-level messages
317 ## SPEW 9 Way too many details
319 ## Request this level of debugging output
320 default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
321 ## At a maximum only compile in this level of debugging
322 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
325 ## Select power on after power fail setting
326 default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
333 default CONFIG_CBFS=1