src/mainboard/iwill/dk8_htx/Config.lb

   1 ##
   2 ## Compute the location and size of where this firmware image
   3 ## (linuxBIOS plus bootloader) will live in the boot rom chip.
   4 ##
   5 if USE_FAILOVER_IMAGE
   6         default ROM_SECTION_SIZE   = FAILOVER_SIZE
   7         default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE )
   8 else
   9     if USE_FALLBACK_IMAGE
  10         default ROM_SECTION_SIZE   = FALLBACK_SIZE
  11         default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
  12     else
  13         default ROM_SECTION_SIZE   = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
  14         default ROM_SECTION_OFFSET = 0
  15     end
  16 end
  17
  18 ##
  19 ## Compute the start location and size size of
  20 ## The linuxBIOS bootloader.
  21 ##
  22 default PAYLOAD_SIZE            = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
  23 default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
  24
  25 ##
  26 ## Compute where this copy of linuxBIOS will start in the boot rom
  27 ##
  28 default _ROMBASE      = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
  29
  30 ##
  31 ## Compute a range of ROM that can cached to speed up linuxBIOS,
  32 ## execution speed.
  33 ##
  34 ## XIP_ROM_SIZE must be a power of 2.
  35 ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
  36 ##
  37 default XIP_ROM_SIZE=65536
  38
  39 if USE_FAILOVER_IMAGE
  40         default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
  41 else
  42     if USE_FALLBACK_IMAGE
  43         default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
  44     else
  45         default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
  46     end
  47 end
  48
  49 arch i386 end
  50
  51 ##
  52 ## Build the objects we have code for in this directory.
  53 ##
  54
  55 driver mainboard.o
  56
  57 #dir /drivers/si/3114
  58
  59 #needed by irq_tables and mptable and acpi_tables
  60 object get_bus_conf.o
  61
  62 if HAVE_MP_TABLE
  63         object mptable.o
  64 end
  65
  66 if HAVE_PIRQ_TABLE
  67         object irq_tables.o
  68 end
  69
  70 #if HAVE_ACPI_TABLES
  71 #       object acpi_tables.o
  72 #       object fadt.o
  73 #       if SB_HT_CHAIN_ON_BUS0
  74 #               object dsdt_bus0.o
  75 #       else
  76 #               object dsdt.o
  77 #       end
  78 #       object ssdt.o
  79 #       if ACPI_SSDTX_NUM
  80 #                if SB_HT_CHAIN_ON_BUS0
  81 #                 object ssdt2_bus0.o
  82 #                else
  83 #                 object ssdt2.o
  84 #                end
  85 #       end
  86 #end
  87
  88 if HAVE_ACPI_TABLES
  89         object acpi_tables.o
  90         object fadt.o
  91         makerule dsdt.c
  92                 depends "$(MAINBOARD)/dx/dsdt_lb.dsl"
  93                 action  "iasl -p $(PWD)/dsdt_lb -tc $(MAINBOARD)/dx/dsdt_lb.dsl"
  94                 action  "mv dsdt_lb.hex dsdt.c"
  95         end
  96         object ./dsdt.o
  97
  98         #./ssdt.o is moved to northbridge/amd/amdk8/Config.lb
  99
 100         if ACPI_SSDTX_NUM
 101             makerule ssdt2.c
 102                         depends "$(MAINBOARD)/dx/pci2.asl"
 103                         action  "iasl -p $(PWD)/pci2 -tc $(MAINBOARD)/dx/pci2.asl"
 104                         action  "perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex"
 105                         action  "mv pci2.hex ssdt2.c"
 106             end
 107             object ./ssdt2.o
 108             makerule ssdt3.c
 109                         depends "$(MAINBOARD)/dx/pci3.asl"
 110                         action  "iasl -p $(PWD)/pci3 -tc $(MAINBOARD)/dx/pci3.asl"
 111                         action  "perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex"
 112                         action  "mv pci3.hex ssdt3.c"
 113             end
 114             object ./ssdt3.o
 115             makerule ssdt4.c
 116                         depends "$(MAINBOARD)/dx/pci4.asl"
 117                         action  "iasl -p $(PWD)/pci4 -tc $(MAINBOARD)/dx/pci4.asl"
 118                         action  "perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex"
 119                         action  "mv pci4.hex ssdt4.c"
 120             end
 121             object ./ssdt4.o
 122             makerule ssdt5.c
 123                         depends "$(MAINBOARD)/dx/pci5.asl"
 124                         action  "iasl -p $(PWD)/pci5 -tc $(MAINBOARD)/dx/pci5.asl"
 125                         action  "perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' pci5.hex"
 126                         action  "mv pci5.hex ssdt5.c"
 127             end
 128             object ./ssdt5.o
 129         end
 130 end
 131
 132 if USE_DCACHE_RAM
 133
 134         if CONFIG_USE_INIT
 135                 # compile cache_as_ram.c to auto.o
 136                 makerule ./cache_as_ram_auto.o
 137                         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
 138                         action "$(CC) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o $@"
 139                 end
 140
 141         else
 142                 #compile cache_as_ram.c to auto.inc
 143                 makerule ./cache_as_ram_auto.inc
 144                         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
 145                         action "$(CC) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -S -o $@"
 146                         action "perl -e 's/.rodata/.rom.data/g' -pi $@"
 147                         action "perl -e 's/.text/.section .rom.text/g' -pi $@"
 148                 end
 149
 150         end
 151 end
 152
 153 if USE_FAILOVER_IMAGE
 154 else
 155     if CONFIG_AP_CODE_IN_CAR
 156         makerule ./apc_auto.o
 157                 depends "$(MAINBOARD)/apc_auto.c option_table.h"
 158                 action "$(CC) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/apc_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o $@"
 159         end
 160         ldscript /arch/i386/init/ldscript_apc.lb
 161     end
 162 end
 163
 164 ##
 165 ## Build our 16 bit and 32 bit linuxBIOS entry code
 166 ##
 167
 168 if HAVE_FAILOVER_BOOT
 169     if USE_FAILOVER_IMAGE
 170         mainboardinit cpu/x86/16bit/entry16.inc
 171         ldscript /cpu/x86/16bit/entry16.lds
 172     end
 173 else
 174     if USE_FALLBACK_IMAGE
 175         mainboardinit cpu/x86/16bit/entry16.inc
 176         ldscript /cpu/x86/16bit/entry16.lds
 177     end
 178 end
 179
 180 mainboardinit cpu/x86/32bit/entry32.inc
 181 if USE_DCACHE_RAM
 182         if CONFIG_USE_INIT
 183                 ldscript /cpu/x86/32bit/entry32.lds
 184         end
 185
 186         if CONFIG_USE_INIT
 187                 ldscript /cpu/amd/car/cache_as_ram.lds
 188         end
 189 end
 190
 191 ##
 192 ## Build our reset vector (This is where linuxBIOS is entered)
 193 ##
 194 if HAVE_FAILOVER_BOOT
 195     if USE_FAILOVER_IMAGE
 196         mainboardinit cpu/x86/16bit/reset16.inc
 197         ldscript /cpu/x86/16bit/reset16.lds
 198     else
 199         mainboardinit cpu/x86/32bit/reset32.inc
 200         ldscript /cpu/x86/32bit/reset32.lds
 201     end
 202 else
 203     if USE_FALLBACK_IMAGE
 204         mainboardinit cpu/x86/16bit/reset16.inc
 205         ldscript /cpu/x86/16bit/reset16.lds
 206     else
 207         mainboardinit cpu/x86/32bit/reset32.inc
 208         ldscript /cpu/x86/32bit/reset32.lds
 209     end
 210 end
 211
 212 ##
 213 ## Include an id string (For safe flashing)
 214 ##
 215 mainboardinit arch/i386/lib/id.inc
 216 ldscript /arch/i386/lib/id.lds
 217
 218 if USE_DCACHE_RAM
 219         ##
 220         ## Setup Cache-As-Ram
 221         ##
 222         mainboardinit cpu/amd/car/cache_as_ram.inc
 223 end
 224
 225 ###
 226 ### This is the early phase of linuxBIOS startup
 227 ### Things are delicate and we test to see if we should
 228 ### failover to another image.
 229 ###
 230 if HAVE_FAILOVER_BOOT
 231     if USE_FAILOVER_IMAGE
 232         if USE_DCACHE_RAM
 233                 ldscript /arch/i386/lib/failover_failover.lds
 234         end
 235     end
 236 else
 237     if USE_FALLBACK_IMAGE
 238         if USE_DCACHE_RAM
 239                 ldscript /arch/i386/lib/failover.lds
 240         end
 241     end
 242 end
 243
 244 ###
 245 ### O.k. We aren't just an intermediary anymore!
 246 ###
 247
 248 ##
 249 ## Setup RAM
 250 ##
 251 if USE_DCACHE_RAM
 252
 253         if CONFIG_USE_INIT
 254                 initobject cache_as_ram_auto.o
 255         else
 256                 mainboardinit ./cache_as_ram_auto.inc
 257         end
 258
 259 end
 260
 261 ##
 262 ## Include the secondary Configuration files
 263 ##
 264 if CONFIG_CHIP_NAME
 265         config chip.h
 266 end
 267
 268 dir /southbridge/amd/amd8132
 269
 270 chip northbridge/amd/amdk8/root_complex
 271         device apic_cluster 0 on
 272                 chip cpu/amd/socket_940
 273                         device apic 0 on end
 274                 end
 275         end
 276         device pci_domain 0 on
 277                 chip northbridge/amd/amdk8
 278                         device pci 18.0 on end
 279                         device pci 18.0 on end
 280                         device pci 18.0 on #  northbridge
 281                                 chip southbridge/amd/amd8131
 282                                         # the on/off keyword is mandatory
 283                                         device pci 0.0 on end
 284                                         device pci 0.1 on end
 285                                         device pci 1.0 on end
 286                                         device pci 1.1 on end
 287                                 end
 288                                 chip southbridge/amd/amd8111
 289                                         # this "device pci 0.0" is the parent the next one
 290                                         # PCI bridge
 291                                         device pci 0.0 on
 292                                                 device pci 0.0 on end
 293                                                 device pci 0.1 on end
 294                                                 device pci 0.2 off end
 295                                                 device pci 1.0 off end
 296                                                 #chip drivers/pci/onboard
 297                                                 #        device pci 6.0 on end
 298                                                 #       register "rom_address" = "0xfff80000"
 299                                                 #end
 300                                         end
 301                                         device pci 1.0 on
 302                                                 chip superio/winbond/w83627hf
 303                                                         device pnp 2e.0 off #  Floppy
 304                                                                 io 0x60 = 0x3f0
 305                                                                 irq 0x70 = 6
 306                                                                 drq 0x74 = 2
 307                                                         end
 308                                                         device pnp 2e.1 off #  Parallel Port
 309                                                                 io 0x60 = 0x378
 310                                                                 irq 0x70 = 7
 311                                                         end
 312                                                         device pnp 2e.2 on #  Com1
 313                                                                 io 0x60 = 0x3f8
 314                                                                 irq 0x70 = 4
 315                                                         end
 316                                                         device pnp 2e.3 off #  Com2
 317                                                                 io 0x60 = 0x2f8
 318                                                                 irq 0x70 = 3
 319                                                         end
 320                                                         device pnp 2e.5 on #  Keyboard
 321                                                                 io 0x60 = 0x60
 322                                                                 io 0x62 = 0x64
 323                                                                 irq 0x70 = 1
 324                                                                 irq 0x72 = 12
 325                                                         end
 326                                                         device pnp 2e.6 off #  CIR
 327                                                                 io 0x60 = 0x100
 328                                                         end
 329                                                         device pnp 2e.7 off #  GAME_MIDI_GIPO1
 330                                                                 io 0x60 = 0x220
 331                                                                 io 0x62 = 0x300
 332                                                                 irq 0x70 = 9
 333                                                         end
 334                                                         device pnp 2e.8 on #  GPIO2
 335                                                                 io 0x07 = 0x08ff
 336                                                                 io 0x30 = 0x01ff
 337                                                                 io 0x2b = 0xd0ff
 338                                                                 io 0xf0 = 0xef16
 339                                                         end
 340                                                         device pnp 2e.9 off end #  GPIO3
 341                                                         device pnp 2e.a off end #  ACPI
 342                                                         device pnp 2e.b on #  HW Monitor
 343                                                                 io 0x60 = 0x290
 344                                                                 irq 0x70 = 5
 345                                                         end
 346                                                 end
 347                                         end
 348                                         device pci 1.1 on end
 349                                         device pci 1.2 on end
 350                                         device pci 1.3 on
 351                                                 chip drivers/generic/generic #dimm 0-0-0
 352                                                         device i2c 50 on end
 353                                                 end
 354                                                 chip drivers/generic/generic #dimm 0-0-1
 355                                                         device i2c 51 on end
 356                                                 end
 357                                                 chip drivers/generic/generic #dimm 0-1-0
 358                                                         device i2c 52 on end
 359                                                 end
 360                                                 chip drivers/generic/generic #dimm 0-1-1
 361                                                         device i2c 53 on end
 362                                                 end
 363                                                 chip drivers/generic/generic #dimm 1-0-0
 364                                                         device i2c 54 on end
 365                                                 end
 366                                                 chip drivers/generic/generic #dimm 1-0-1
 367                                                         device i2c 55 on end
 368                                                 end
 369                                                 chip drivers/generic/generic #dimm 1-1-0
 370                                                         device i2c 56 on end
 371                                                 end
 372                                                 chip drivers/generic/generic #dimm 1-1-1
 373                                                         device i2c 57 on end
 374                                                 end
 375                                         end # acpi
 376                                         device pci 1.5 off end
 377                                         device pci 1.6 off end
 378                                         register "ide0_enable" = "1"
 379                                         register "ide1_enable" = "1"
 380                                 end
 381                         end #  device pci 18.0
 382
 383                         device pci 18.1 on end
 384                         device pci 18.2 on end
 385                         device pci 18.3 on end
 386                 end
 387
 388         end #pci_domain
 389 #        chip drivers/generic/debug
 390 #               device pnp 0.0 off end # chip name
 391 #                device pnp 0.1 on end # pci_regs_all
 392 #                device pnp 0.2 off end # mem
 393 #                device pnp 0.3 off end # cpuid
 394 #                device pnp 0.4 off end # smbus_regs_all
 395 #                device pnp 0.5 off end # dual core msr
 396 #                device pnp 0.6 off end # cache size
 397 #                device pnp 0.7 off end # tsc
 398 #       end
 399
 400 end
 401
 402