src/mainboard/iwill/dk8_htx/Config.lb

   1 include /config/failovercalculation.lb
   2
   3 arch i386 end
   4
   5 ##
   6 ## Build the objects we have code for in this directory.
   7 ##
   8
   9 driver mainboard.o
  10
  11 #dir /drivers/si/3114
  12
  13 #needed by irq_tables and mptable and acpi_tables
  14 object get_bus_conf.o
  15
  16 if HAVE_MP_TABLE
  17         object mptable.o
  18 end
  19
  20 if HAVE_PIRQ_TABLE
  21         object irq_tables.o
  22 end
  23
  24 #if HAVE_ACPI_TABLES
  25 #       object acpi_tables.o
  26 #       object fadt.o
  27 #       if SB_HT_CHAIN_ON_BUS0
  28 #               object dsdt_bus0.o
  29 #       else
  30 #               object dsdt.o
  31 #       end
  32 #       object ssdt.o
  33 #       if ACPI_SSDTX_NUM
  34 #                if SB_HT_CHAIN_ON_BUS0
  35 #                 object ssdt2_bus0.o
  36 #                else
  37 #                 object ssdt2.o
  38 #                end
  39 #       end
  40 #end
  41
  42 if HAVE_ACPI_TABLES
  43         object acpi_tables.o
  44         object fadt.o
  45         makerule dsdt.c
  46                 depends "$(MAINBOARD)/dx/dsdt_lb.dsl"
  47                 action  "iasl -p $(PWD)/dsdt_lb -tc $(MAINBOARD)/dx/dsdt_lb.dsl"
  48                 action  "mv dsdt_lb.hex dsdt.c"
  49         end
  50         object ./dsdt.o
  51
  52         #./ssdt.o is moved to northbridge/amd/amdk8/Config.lb
  53
  54         if ACPI_SSDTX_NUM
  55             makerule ssdt2.c
  56                         depends "$(MAINBOARD)/dx/pci2.asl"
  57                         action  "iasl -p $(PWD)/pci2 -tc $(MAINBOARD)/dx/pci2.asl"
  58                         action  "perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex"
  59                         action  "mv pci2.hex ssdt2.c"
  60             end
  61             object ./ssdt2.o
  62             makerule ssdt3.c
  63                         depends "$(MAINBOARD)/dx/pci3.asl"
  64                         action  "iasl -p $(PWD)/pci3 -tc $(MAINBOARD)/dx/pci3.asl"
  65                         action  "perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex"
  66                         action  "mv pci3.hex ssdt3.c"
  67             end
  68             object ./ssdt3.o
  69             makerule ssdt4.c
  70                         depends "$(MAINBOARD)/dx/pci4.asl"
  71                         action  "iasl -p $(PWD)/pci4 -tc $(MAINBOARD)/dx/pci4.asl"
  72                         action  "perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex"
  73                         action  "mv pci4.hex ssdt4.c"
  74             end
  75             object ./ssdt4.o
  76             makerule ssdt5.c
  77                         depends "$(MAINBOARD)/dx/pci5.asl"
  78                         action  "iasl -p $(PWD)/pci5 -tc $(MAINBOARD)/dx/pci5.asl"
  79                         action  "perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' pci5.hex"
  80                         action  "mv pci5.hex ssdt5.c"
  81             end
  82             object ./ssdt5.o
  83         end
  84 end
  85
  86         if CONFIG_USE_INIT
  87                 # compile cache_as_ram.c to auto.o
  88                 makerule ./cache_as_ram_auto.o
  89                         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
  90                         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c $(MAINBOARD)/cache_as_ram_auto.c -o $@"
  91                 end
  92
  93         else
  94                 #compile cache_as_ram.c to auto.inc
  95                 makerule ./cache_as_ram_auto.inc
  96                         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
  97                         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c -S $(MAINBOARD)/cache_as_ram_auto.c -o $@"
  98                         action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
  99                         action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
 100                 end
 101
 102         end
 103
 104 if USE_FAILOVER_IMAGE
 105 else
 106     if CONFIG_AP_CODE_IN_CAR
 107         makerule ./apc_auto.o
 108                 depends "$(MAINBOARD)/apc_auto.c option_table.h"
 109                 action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c $(MAINBOARD)/apc_auto.c -o $@"
 110         end
 111         ldscript /arch/i386/init/ldscript_apc.lb
 112     end
 113 end
 114
 115 ##
 116 ## Build our 16 bit and 32 bit coreboot entry code
 117 ##
 118
 119 if HAVE_FAILOVER_BOOT
 120     if USE_FAILOVER_IMAGE
 121         mainboardinit cpu/x86/16bit/entry16.inc
 122         ldscript /cpu/x86/16bit/entry16.lds
 123     end
 124 else
 125     if USE_FALLBACK_IMAGE
 126         mainboardinit cpu/x86/16bit/entry16.inc
 127         ldscript /cpu/x86/16bit/entry16.lds
 128     end
 129 end
 130
 131 mainboardinit cpu/x86/32bit/entry32.inc
 132         if CONFIG_USE_INIT
 133                 ldscript /cpu/x86/32bit/entry32.lds
 134         end
 135
 136         if CONFIG_USE_INIT
 137                 ldscript /cpu/amd/car/cache_as_ram.lds
 138         end
 139
 140 ##
 141 ## Build our reset vector (This is where coreboot is entered)
 142 ##
 143 if HAVE_FAILOVER_BOOT
 144     if USE_FAILOVER_IMAGE
 145         mainboardinit cpu/x86/16bit/reset16.inc
 146         ldscript /cpu/x86/16bit/reset16.lds
 147     else
 148         mainboardinit cpu/x86/32bit/reset32.inc
 149         ldscript /cpu/x86/32bit/reset32.lds
 150     end
 151 else
 152     if USE_FALLBACK_IMAGE
 153         mainboardinit cpu/x86/16bit/reset16.inc
 154         ldscript /cpu/x86/16bit/reset16.lds
 155     else
 156         mainboardinit cpu/x86/32bit/reset32.inc
 157         ldscript /cpu/x86/32bit/reset32.lds
 158     end
 159 end
 160
 161 ##
 162 ## Include an id string (For safe flashing)
 163 ##
 164 mainboardinit arch/i386/lib/id.inc
 165 ldscript /arch/i386/lib/id.lds
 166
 167         ##
 168         ## Setup Cache-As-Ram
 169         ##
 170         mainboardinit cpu/amd/car/cache_as_ram.inc
 171
 172 ###
 173 ### This is the early phase of coreboot startup
 174 ### Things are delicate and we test to see if we should
 175 ### failover to another image.
 176 ###
 177 if HAVE_FAILOVER_BOOT
 178     if USE_FAILOVER_IMAGE
 179                 ldscript /arch/i386/lib/failover_failover.lds
 180     end
 181 else
 182     if USE_FALLBACK_IMAGE
 183                 ldscript /arch/i386/lib/failover.lds
 184     end
 185 end
 186
 187 ###
 188 ### O.k. We aren't just an intermediary anymore!
 189 ###
 190
 191 ##
 192 ## Setup RAM
 193 ##
 194         if CONFIG_USE_INIT
 195                 initobject cache_as_ram_auto.o
 196         else
 197                 mainboardinit ./cache_as_ram_auto.inc
 198         end
 199
 200 ##
 201 ## Include the secondary Configuration files
 202 ##
 203 config chip.h
 204
 205 dir /southbridge/amd/amd8132
 206
 207 chip northbridge/amd/amdk8/root_complex
 208         device apic_cluster 0 on
 209                 chip cpu/amd/socket_940
 210                         device apic 0 on end
 211                 end
 212         end
 213         device pci_domain 0 on
 214                 chip northbridge/amd/amdk8
 215                         device pci 18.0 on end
 216                         device pci 18.0 on end
 217                         device pci 18.0 on #  northbridge
 218                                 chip southbridge/amd/amd8131
 219                                         # the on/off keyword is mandatory
 220                                         device pci 0.0 on end
 221                                         device pci 0.1 on end
 222                                         device pci 1.0 on end
 223                                         device pci 1.1 on end
 224                                 end
 225                                 chip southbridge/amd/amd8111
 226                                         # this "device pci 0.0" is the parent the next one
 227                                         # PCI bridge
 228                                         device pci 0.0 on
 229                                                 device pci 0.0 on end
 230                                                 device pci 0.1 on end
 231                                                 device pci 0.2 off end
 232                                                 device pci 1.0 off end
 233                                                 #chip drivers/pci/onboard
 234                                                 #        device pci 6.0 on end
 235                                                 #       register "rom_address" = "0xfff80000"
 236                                                 #end
 237                                         end
 238                                         device pci 1.0 on
 239                                                 chip superio/winbond/w83627hf
 240                                                         device pnp 2e.0 off #  Floppy
 241                                                                 io 0x60 = 0x3f0
 242                                                                 irq 0x70 = 6
 243                                                                 drq 0x74 = 2
 244                                                         end
 245                                                         device pnp 2e.1 off #  Parallel Port
 246                                                                 io 0x60 = 0x378
 247                                                                 irq 0x70 = 7
 248                                                         end
 249                                                         device pnp 2e.2 on #  Com1
 250                                                                 io 0x60 = 0x3f8
 251                                                                 irq 0x70 = 4
 252                                                         end
 253                                                         device pnp 2e.3 off #  Com2
 254                                                                 io 0x60 = 0x2f8
 255                                                                 irq 0x70 = 3
 256                                                         end
 257                                                         device pnp 2e.5 on #  Keyboard
 258                                                                 io 0x60 = 0x60
 259                                                                 io 0x62 = 0x64
 260                                                                 irq 0x70 = 1
 261                                                                 irq 0x72 = 12
 262                                                         end
 263                                                         device pnp 2e.6 off #  CIR
 264                                                                 io 0x60 = 0x100
 265                                                         end
 266                                                         device pnp 2e.7 off #  GAME_MIDI_GIPO1
 267                                                                 io 0x60 = 0x220
 268                                                                 io 0x62 = 0x300
 269                                                                 irq 0x70 = 9
 270                                                         end
 271                                                         device pnp 2e.8 on #  GPIO2
 272                                                                 io 0x07 = 0x08ff
 273                                                                 io 0x30 = 0x01ff
 274                                                                 io 0x2b = 0xd0ff
 275                                                                 io 0xf0 = 0xef16
 276                                                         end
 277                                                         device pnp 2e.9 off end #  GPIO3
 278                                                         device pnp 2e.a off end #  ACPI
 279                                                         device pnp 2e.b on #  HW Monitor
 280                                                                 io 0x60 = 0x290
 281                                                                 irq 0x70 = 5
 282                                                         end
 283                                                 end
 284                                         end
 285                                         device pci 1.1 on end
 286                                         device pci 1.2 on end
 287                                         device pci 1.3 on
 288                                                 chip drivers/generic/generic #dimm 0-0-0
 289                                                         device i2c 50 on end
 290                                                 end
 291                                                 chip drivers/generic/generic #dimm 0-0-1
 292                                                         device i2c 51 on end
 293                                                 end
 294                                                 chip drivers/generic/generic #dimm 0-1-0
 295                                                         device i2c 52 on end
 296                                                 end
 297                                                 chip drivers/generic/generic #dimm 0-1-1
 298                                                         device i2c 53 on end
 299                                                 end
 300                                                 chip drivers/generic/generic #dimm 1-0-0
 301                                                         device i2c 54 on end
 302                                                 end
 303                                                 chip drivers/generic/generic #dimm 1-0-1
 304                                                         device i2c 55 on end
 305                                                 end
 306                                                 chip drivers/generic/generic #dimm 1-1-0
 307                                                         device i2c 56 on end
 308                                                 end
 309                                                 chip drivers/generic/generic #dimm 1-1-1
 310                                                         device i2c 57 on end
 311                                                 end
 312                                         end # acpi
 313                                         device pci 1.5 off end
 314                                         device pci 1.6 off end
 315                                         register "ide0_enable" = "1"
 316                                         register "ide1_enable" = "1"
 317                                 end
 318                         end #  device pci 18.0
 319
 320                         device pci 18.1 on end
 321                         device pci 18.2 on end
 322                         device pci 18.3 on end
 323                 end
 324
 325         end #pci_domain
 326 #        chip drivers/generic/debug
 327 #               device pnp 0.0 off end # chip name
 328 #                device pnp 0.1 on end # pci_regs_all
 329 #                device pnp 0.2 off end # mem
 330 #                device pnp 0.3 off end # cpuid
 331 #                device pnp 0.4 off end # smbus_regs_all
 332 #                device pnp 0.5 off end # dual core msr
 333 #                device pnp 0.6 off end # cache size
 334 #                device pnp 0.7 off end # tsc
 335 #       end
 336
 337 end
 338
 339